From ebc42b478b0c9a6d69a0edebc9182d9ec302f603 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 18 Mar 2019 13:56:13 +0100 Subject: [PATCH] ARM: dts: sun8i: a23/a33: Add R_I2C Controller The A23 and A33 both have an I2C controller in the ARISC domain, that share the same pins with the RSB bus. Even if it's an unusual configuration, that device can be used to drive the PMIC, so let's use it. Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 396d32cfff36..5d2c438e5959 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -781,6 +781,20 @@ status = "disabled"; }; + r_i2c: i2c@1f02400 { + compatible = "allwinner,sun8i-a23-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x01f02400 0x400>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c_pins>; + clocks = <&apb0_gates 6>; + resets = <&apb0_rst 6>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; @@ -793,6 +807,12 @@ #interrupt-cells = <3>; #gpio-cells = <3>; + r_i2c_pins: r-i2c-pins { + pins = "PL0", "PL1"; + function = "s_i2c"; + bias-pull-up; + }; + r_rsb_pins: r-rsb-pins { pins = "PL0", "PL1"; function = "s_rsb";