mmc: dw_mmc: split out preparation of desc for IDMAC32 and IDMAC64
We intend to add more check for descriptors when preparing desc. Let's spilt out the separate body to make the dw_mci_translate_sglist not so lengthy. After spliting out these two functions, we could remove dw_mci_translate_sglist and call both of them when staring idmac. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -467,112 +467,121 @@ static void dw_mci_dmac_complete_dma(void *arg)
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}
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}
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static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data,
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unsigned int sg_len)
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static inline void dw_mci_prepare_desc64(struct dw_mci *host,
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struct mmc_data *data,
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unsigned int sg_len)
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{
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unsigned int desc_len;
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struct idmac_desc_64addr *desc_first, *desc_last, *desc;
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int i;
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if (host->dma_64bit_address == 1) {
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struct idmac_desc_64addr *desc_first, *desc_last, *desc;
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desc_first = desc_last = desc = host->sg_cpu;
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desc_first = desc_last = desc = host->sg_cpu;
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for (i = 0; i < sg_len; i++) {
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unsigned int length = sg_dma_len(&data->sg[i]);
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for (i = 0; i < sg_len; i++) {
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unsigned int length = sg_dma_len(&data->sg[i]);
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u64 mem_addr = sg_dma_address(&data->sg[i]);
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u64 mem_addr = sg_dma_address(&data->sg[i]);
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for ( ; length ; desc++) {
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desc_len = (length <= DW_MCI_DESC_DATA_LENGTH) ?
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length : DW_MCI_DESC_DATA_LENGTH;
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for ( ; length ; desc++) {
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desc_len = (length <= DW_MCI_DESC_DATA_LENGTH) ?
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length : DW_MCI_DESC_DATA_LENGTH;
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length -= desc_len;
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length -= desc_len;
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/*
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* Set the OWN bit and disable interrupts
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* for this descriptor
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*/
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desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
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IDMAC_DES0_CH;
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/*
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* Set the OWN bit and disable interrupts
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* for this descriptor
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*/
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desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC |
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IDMAC_DES0_CH;
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/* Buffer length */
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IDMAC_64ADDR_SET_BUFFER1_SIZE(desc, desc_len);
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/* Buffer length */
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IDMAC_64ADDR_SET_BUFFER1_SIZE(desc, desc_len);
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/* Physical address to DMA to/from */
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desc->des4 = mem_addr & 0xffffffff;
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desc->des5 = mem_addr >> 32;
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/* Physical address to DMA to/from */
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desc->des4 = mem_addr & 0xffffffff;
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desc->des5 = mem_addr >> 32;
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/* Update physical address for the next desc */
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mem_addr += desc_len;
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/* Update physical address for the next desc */
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mem_addr += desc_len;
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/* Save pointer to the last descriptor */
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desc_last = desc;
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}
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/* Save pointer to the last descriptor */
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desc_last = desc;
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}
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/* Set first descriptor */
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desc_first->des0 |= IDMAC_DES0_FD;
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/* Set last descriptor */
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desc_last->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
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desc_last->des0 |= IDMAC_DES0_LD;
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} else {
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struct idmac_desc *desc_first, *desc_last, *desc;
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desc_first = desc_last = desc = host->sg_cpu;
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for (i = 0; i < sg_len; i++) {
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unsigned int length = sg_dma_len(&data->sg[i]);
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u32 mem_addr = sg_dma_address(&data->sg[i]);
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for ( ; length ; desc++) {
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desc_len = (length <= DW_MCI_DESC_DATA_LENGTH) ?
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length : DW_MCI_DESC_DATA_LENGTH;
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length -= desc_len;
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/*
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* Set the OWN bit and disable interrupts
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* for this descriptor
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*/
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desc->des0 = cpu_to_le32(IDMAC_DES0_OWN |
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IDMAC_DES0_DIC |
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IDMAC_DES0_CH);
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/* Buffer length */
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IDMAC_SET_BUFFER1_SIZE(desc, desc_len);
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/* Physical address to DMA to/from */
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desc->des2 = cpu_to_le32(mem_addr);
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/* Update physical address for the next desc */
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mem_addr += desc_len;
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/* Save pointer to the last descriptor */
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desc_last = desc;
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}
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}
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/* Set first descriptor */
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desc_first->des0 |= cpu_to_le32(IDMAC_DES0_FD);
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/* Set last descriptor */
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desc_last->des0 &= cpu_to_le32(~(IDMAC_DES0_CH |
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IDMAC_DES0_DIC));
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desc_last->des0 |= cpu_to_le32(IDMAC_DES0_LD);
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}
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wmb(); /* drain writebuffer */
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/* Set first descriptor */
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desc_first->des0 |= IDMAC_DES0_FD;
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/* Set last descriptor */
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desc_last->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
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desc_last->des0 |= IDMAC_DES0_LD;
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}
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static inline void dw_mci_prepare_desc32(struct dw_mci *host,
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struct mmc_data *data,
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unsigned int sg_len)
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{
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unsigned int desc_len;
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struct idmac_desc *desc_first, *desc_last, *desc;
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int i;
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desc_first = desc_last = desc = host->sg_cpu;
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for (i = 0; i < sg_len; i++) {
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unsigned int length = sg_dma_len(&data->sg[i]);
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u32 mem_addr = sg_dma_address(&data->sg[i]);
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for ( ; length ; desc++) {
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desc_len = (length <= DW_MCI_DESC_DATA_LENGTH) ?
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length : DW_MCI_DESC_DATA_LENGTH;
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length -= desc_len;
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/*
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* Set the OWN bit and disable interrupts
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* for this descriptor
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*/
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desc->des0 = cpu_to_le32(IDMAC_DES0_OWN |
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IDMAC_DES0_DIC |
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IDMAC_DES0_CH);
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/* Buffer length */
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IDMAC_SET_BUFFER1_SIZE(desc, desc_len);
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/* Physical address to DMA to/from */
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desc->des2 = cpu_to_le32(mem_addr);
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/* Update physical address for the next desc */
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mem_addr += desc_len;
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/* Save pointer to the last descriptor */
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desc_last = desc;
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}
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}
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/* Set first descriptor */
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desc_first->des0 |= cpu_to_le32(IDMAC_DES0_FD);
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/* Set last descriptor */
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desc_last->des0 &= cpu_to_le32(~(IDMAC_DES0_CH |
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IDMAC_DES0_DIC));
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desc_last->des0 |= cpu_to_le32(IDMAC_DES0_LD);
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}
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static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len)
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{
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u32 temp;
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dw_mci_translate_sglist(host, host->data, sg_len);
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if (host->dma_64bit_address == 1)
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dw_mci_prepare_desc64(host, host->data, sg_len);
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else
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dw_mci_prepare_desc32(host, host->data, sg_len);
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/* drain writebuffer */
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wmb();
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/* Make sure to reset DMA in case we did PIO before this */
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dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET);
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