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ASoC: amd: ps: remove the register read and write wrappers.

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Instead of acp63_readl() and acp63_writel() wrappers
readl and writel functions can be used directly.
Remove acp63_readl() and acp63_writel() wrappers.

Signed-off-by: Syed Saba Kareem <Syed.SabaKareem@amd.com
Reviewed-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com
Link: https://lore.kernel.org/r/20230426122219.3745586-1-Syed.SabaKareem@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org
This commit is contained in:
Syed Saba Kareem 2023-04-26 17:52:01 +05:30 committed by Mark Brown
parent 9abcd24002
commit ec54f8103d
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
3 changed files with 46 additions and 60 deletions
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10
sound/soc/amd/ps/acp63.h
View File

@ -92,16 +92,6 @@ struct pdm_dev_data {
struct snd_pcm_substream *capture_stream;
};
static inline u32 acp63_readl(void __iomem *base_addr)
{
return readl(base_addr);
}
static inline void acp63_writel(u32 val, void __iomem *base_addr)
{
writel(val, base_addr);
}
struct acp63_dev_data {
void __iomem *acp63_base;
struct resource *res;

33
sound/soc/amd/ps/pci-ps.c
View File

@ -22,16 +22,16 @@ static int acp63_power_on(void __iomem *acp_base)
u32 val;
int timeout;
val = acp63_readl(acp_base + ACP_PGFSM_STATUS);
val = readl(acp_base + ACP_PGFSM_STATUS);
if (!val)
return val;
if ((val & ACP_PGFSM_STATUS_MASK) != ACP_POWER_ON_IN_PROGRESS)
acp63_writel(ACP_PGFSM_CNTL_POWER_ON_MASK, acp_base + ACP_PGFSM_CONTROL);
writel(ACP_PGFSM_CNTL_POWER_ON_MASK, acp_base + ACP_PGFSM_CONTROL);
timeout = 0;
while (++timeout < 500) {
val = acp63_readl(acp_base + ACP_PGFSM_STATUS);
val = readl(acp_base + ACP_PGFSM_STATUS);
if (!val)
return 0;
udelay(1);
@ -44,18 +44,18 @@ static int acp63_reset(void __iomem *acp_base)
u32 val;
int timeout;
acp63_writel(1, acp_base + ACP_SOFT_RESET);
writel(1, acp_base + ACP_SOFT_RESET);
timeout = 0;
while (++timeout < 500) {
val = acp63_readl(acp_base + ACP_SOFT_RESET);
val = readl(acp_base + ACP_SOFT_RESET);
if (val & ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK)
break;
cpu_relax();
}
acp63_writel(0, acp_base + ACP_SOFT_RESET);
writel(0, acp_base + ACP_SOFT_RESET);
timeout = 0;
while (++timeout < 500) {
val = acp63_readl(acp_base + ACP_SOFT_RESET);
val = readl(acp_base + ACP_SOFT_RESET);
if (!val)
return 0;
cpu_relax();
@ -65,15 +65,14 @@ static int acp63_reset(void __iomem *acp_base)
static void acp63_enable_interrupts(void __iomem *acp_base)
{
acp63_writel(1, acp_base + ACP_EXTERNAL_INTR_ENB);
writel(1, acp_base + ACP_EXTERNAL_INTR_ENB);
}
static void acp63_disable_interrupts(void __iomem *acp_base)
{
acp63_writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base +
ACP_EXTERNAL_INTR_STAT);
acp63_writel(0, acp_base + ACP_EXTERNAL_INTR_CNTL);
acp63_writel(0, acp_base + ACP_EXTERNAL_INTR_ENB);
writel(ACP_EXT_INTR_STAT_CLEAR_MASK, acp_base + ACP_EXTERNAL_INTR_STAT);
writel(0, acp_base + ACP_EXTERNAL_INTR_CNTL);
writel(0, acp_base + ACP_EXTERNAL_INTR_ENB);
}
static int acp63_init(void __iomem *acp_base, struct device *dev)
@ -85,7 +84,7 @@ static int acp63_init(void __iomem *acp_base, struct device *dev)
dev_err(dev, "ACP power on failed\n");
return ret;
}
acp63_writel(0x01, acp_base + ACP_CONTROL);
writel(0x01, acp_base + ACP_CONTROL);
ret = acp63_reset(acp_base);
if (ret) {
dev_err(dev, "ACP reset failed\n");
@ -105,7 +104,7 @@ static int acp63_deinit(void __iomem *acp_base, struct device *dev)
dev_err(dev, "ACP reset failed\n");
return ret;
}
acp63_writel(0, acp_base + ACP_CONTROL);
writel(0, acp_base + ACP_CONTROL);
return 0;
}
@ -120,11 +119,11 @@ static irqreturn_t acp63_irq_handler(int irq, void *dev_id)
if (!adata)
return IRQ_NONE;
val = acp63_readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
val = readl(adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
if (val & BIT(PDM_DMA_STAT)) {
pdev_index = adata->pdm_dev_index;
ps_pdm_data = dev_get_drvdata(&adata->pdev[pdev_index]->dev);
acp63_writel(BIT(PDM_DMA_STAT), adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
writel(BIT(PDM_DMA_STAT), adata->acp63_base + ACP_EXTERNAL_INTR_STAT);
if (ps_pdm_data->capture_stream)
snd_pcm_period_elapsed(ps_pdm_data->capture_stream);
return IRQ_HANDLED;
@ -302,7 +301,7 @@ static int snd_acp63_probe(struct pci_dev *pci,
dev_err(&pci->dev, "ACP PCI IRQ request failed\n");
goto de_init;
}
val = acp63_readl(adata->acp63_base + ACP_PIN_CONFIG);
val = readl(adata->acp63_base + ACP_PIN_CONFIG);
get_acp63_device_config(val, pci, adata);
ret = create_acp63_platform_devs(pci, adata, addr);
if (ret < 0) {

63
sound/soc/amd/ps/ps-pdm-dma.c
View File

@ -45,10 +45,10 @@ static const struct snd_pcm_hardware acp63_pdm_hardware_capture = {
static void acp63_init_pdm_ring_buffer(u32 physical_addr, u32 buffer_size,
u32 watermark_size, void __iomem *acp_base)
{
acp63_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR);
acp63_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE);
acp63_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
acp63_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL);
writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR);
writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE);
writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);
writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL);
}
static void acp63_enable_pdm_clock(void __iomem *acp_base)
@ -58,11 +58,11 @@ static void acp63_enable_pdm_clock(void __iomem *acp_base)
pdm_clk_enable = ACP_PDM_CLK_FREQ_MASK;
pdm_ctrl = 0x00;
acp63_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL);
pdm_ctrl = acp63_readl(acp_base + ACP_WOV_MISC_CTRL);
writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL);
pdm_ctrl = readl(acp_base + ACP_WOV_MISC_CTRL);
pdm_ctrl &= ~ACP_WOV_GAIN_CONTROL;
pdm_ctrl |= FIELD_PREP(ACP_WOV_GAIN_CONTROL, clamp(pdm_gain, 0, 3));
acp63_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL);
writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL);
}
static void acp63_enable_pdm_interrupts(struct pdm_dev_data *adata)
@ -70,9 +70,9 @@ static void acp63_enable_pdm_interrupts(struct pdm_dev_data *adata)
u32 ext_int_ctrl;
mutex_lock(adata->acp_lock);
ext_int_ctrl = acp63_readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
ext_int_ctrl = readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
ext_int_ctrl |= PDM_DMA_INTR_MASK;
acp63_writel(ext_int_ctrl, adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
writel(ext_int_ctrl, adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
mutex_unlock(adata->acp_lock);
}
@ -81,9 +81,9 @@ static void acp63_disable_pdm_interrupts(struct pdm_dev_data *adata)
u32 ext_int_ctrl;
mutex_lock(adata->acp_lock);
ext_int_ctrl = acp63_readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
ext_int_ctrl = readl(adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
ext_int_ctrl &= ~PDM_DMA_INTR_MASK;
acp63_writel(ext_int_ctrl, adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
writel(ext_int_ctrl, adata->acp63_base + ACP_EXTERNAL_INTR_CNTL);
mutex_unlock(adata->acp_lock);
}
@ -93,8 +93,8 @@ static bool acp63_check_pdm_dma_status(void __iomem *acp_base)
u32 pdm_enable, pdm_dma_enable;
pdm_dma_status = false;
pdm_enable = acp63_readl(acp_base + ACP_WOV_PDM_ENABLE);
pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
pdm_enable = readl(acp_base + ACP_WOV_PDM_ENABLE);
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable & ACP_PDM_DMA_EN_STATUS))
pdm_dma_status = true;
@ -111,11 +111,11 @@ static int acp63_start_pdm_dma(void __iomem *acp_base)
pdm_dma_enable = 0x01;
acp63_enable_pdm_clock(acp_base);
acp63_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
acp63_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
timeout = 0;
while (++timeout < ACP_COUNTER) {
pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
if ((pdm_dma_enable & 0x02) == ACP_PDM_DMA_EN_STATUS)
return 0;
udelay(DELAY_US);
@ -131,14 +131,14 @@ static int acp63_stop_pdm_dma(void __iomem *acp_base)
pdm_enable = 0x00;
pdm_dma_enable = 0x00;
pdm_enable = acp63_readl(acp_base + ACP_WOV_PDM_ENABLE);
pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
pdm_enable = readl(acp_base + ACP_WOV_PDM_ENABLE);
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
if (pdm_dma_enable & 0x01) {
pdm_dma_enable = 0x02;
acp63_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);
timeout = 0;
while (++timeout < ACP_COUNTER) {
pdm_dma_enable = acp63_readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
pdm_dma_enable = readl(acp_base + ACP_WOV_PDM_DMA_ENABLE);
if ((pdm_dma_enable & 0x02) == 0x00)
break;
udelay(DELAY_US);
@ -148,9 +148,9 @@ static int acp63_stop_pdm_dma(void __iomem *acp_base)
}
if (pdm_enable == ACP_PDM_ENABLE) {
pdm_enable = ACP_PDM_DISABLE;
acp63_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);
}
acp63_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH);
writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH);
return 0;
}
@ -164,18 +164,16 @@ static void acp63_config_dma(struct pdm_stream_instance *rtd, int direction)
val = PDM_PTE_OFFSET;
/* Group Enable */
acp63_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp63_base +
ACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
acp63_writel(PAGE_SIZE_4K_ENABLE, rtd->acp63_base +
ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp63_base + ACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
writel(PAGE_SIZE_4K_ENABLE, rtd->acp63_base + ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
/* Load the low address of page int ACP SRAM through SRBM */
low = lower_32_bits(addr);
high = upper_32_bits(addr);
acp63_writel(low, rtd->acp63_base + ACP_SCRATCH_REG_0 + val);
writel(low, rtd->acp63_base + ACP_SCRATCH_REG_0 + val);
high |= BIT(31);
acp63_writel(high, rtd->acp63_base + ACP_SCRATCH_REG_0 + val + 4);
writel(high, rtd->acp63_base + ACP_SCRATCH_REG_0 + val + 4);
val += 8;
addr += PAGE_SIZE;
}
@ -242,9 +240,9 @@ static u64 acp63_pdm_get_byte_count(struct pdm_stream_instance *rtd,
u32 high, low;
u64 byte_count;
high = acp63_readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
high = readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH);
byte_count = high;
low = acp63_readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
low = readl(rtd->acp63_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW);
byte_count = (byte_count << 32) | low;
return byte_count;
}
@ -309,9 +307,8 @@ static int acp63_pdm_dai_trigger(struct snd_pcm_substream *substream,
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
acp63_writel(ch_mask, rtd->acp63_base + ACP_WOV_PDM_NO_OF_CHANNELS);
acp63_writel(PDM_DECIMATION_FACTOR, rtd->acp63_base +
ACP_WOV_PDM_DECIMATION_FACTOR);
writel(ch_mask, rtd->acp63_base + ACP_WOV_PDM_NO_OF_CHANNELS);
writel(PDM_DECIMATION_FACTOR, rtd->acp63_base + ACP_WOV_PDM_DECIMATION_FACTOR);
rtd->bytescount = acp63_pdm_get_byte_count(rtd, substream->stream);
pdm_status = acp63_check_pdm_dma_status(rtd->acp63_base);
if (!pdm_status)