kvm: x86: Intercept #NM for saving IA32_XFD_ERR
Guest IA32_XFD_ERR is generally modified in two places: - Set by CPU when #NM is triggered; - Cleared by guest in its #NM handler; Intercept #NM for the first case when a nonzero value is written to IA32_XFD. Nonzero indicates that the guest is willing to do dynamic fpstate expansion for certain xfeatures, thus KVM needs to manage and virtualize guest XFD_ERR properly. The vcpu exception bitmap is updated in XFD write emulation according to guest_fpu::xfd. Save the current XFD_ERR value to the guest_fpu container in the #NM VM-exit handler. This must be done with interrupt disabled, otherwise the unsaved MSR value may be clobbered by host activity. The saving operation is conducted conditionally only when guest_fpu:xfd includes a non-zero value. Doing so also avoids misread on a platform which doesn't support XFD but #NM is triggered due to L1 interception. Queueing #NM to the guest is postponed to handle_exception_nmi(). This goes through the nested_vmx check so a virtual vmexit is queued instead when #NM is triggered in L2 but L1 wants to intercept it. Restore the host value (always ZERO outside of the host #NM handler) before enabling interrupt. Restore the guest value from the guest_fpu container right before entering the guest (with interrupt disabled). Suggested-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jing Liu <jing2.liu@intel.com> Signed-off-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20220105123532.12586-13-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -129,6 +129,11 @@ static inline bool is_machine_check(u32 intr_info)
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return is_exception_n(intr_info, MC_VECTOR);
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}
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static inline bool is_nm_fault(u32 intr_info)
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{
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return is_exception_n(intr_info, NM_VECTOR);
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}
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/* Undocumented: icebp/int1 */
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static inline bool is_icebp(u32 intr_info)
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{
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@ -36,6 +36,7 @@
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#include <asm/debugreg.h>
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#include <asm/desc.h>
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#include <asm/fpu/api.h>
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#include <asm/fpu/xstate.h>
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#include <asm/idtentry.h>
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#include <asm/io.h>
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#include <asm/irq_remapping.h>
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@ -761,6 +762,13 @@ void vmx_update_exception_bitmap(struct kvm_vcpu *vcpu)
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vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, match);
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}
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/*
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* Trap #NM if guest xfd contains a non-zero value so guest XFD_ERR
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* can be saved timely.
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*/
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if (vcpu->arch.guest_fpu.fpstate->xfd)
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eb |= (1u << NM_VECTOR);
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vmcs_write32(EXCEPTION_BITMAP, eb);
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}
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@ -1967,6 +1975,12 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_KERNEL_GS_BASE:
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vmx_write_guest_kernel_gs_base(vmx, data);
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break;
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case MSR_IA32_XFD:
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ret = kvm_set_msr_common(vcpu, msr_info);
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/* Update #NM interception according to guest xfd */
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if (!ret)
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vmx_update_exception_bitmap(vcpu);
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break;
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#endif
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case MSR_IA32_SYSENTER_CS:
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if (is_guest_mode(vcpu))
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@ -4798,6 +4812,17 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu)
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if (is_machine_check(intr_info) || is_nmi(intr_info))
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return 1; /* handled by handle_exception_nmi_irqoff() */
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/*
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* Queue the exception here instead of in handle_nm_fault_irqoff().
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* This ensures the nested_vmx check is not skipped so vmexit can
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* be reflected to L1 (when it intercepts #NM) before reaching this
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* point.
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*/
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if (is_nm_fault(intr_info)) {
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kvm_queue_exception(vcpu, NM_VECTOR);
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return 1;
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}
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if (is_invalid_opcode(intr_info))
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return handle_ud(vcpu);
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@ -6399,6 +6424,26 @@ static void handle_interrupt_nmi_irqoff(struct kvm_vcpu *vcpu,
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kvm_after_interrupt(vcpu);
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}
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static void handle_nm_fault_irqoff(struct kvm_vcpu *vcpu)
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{
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/*
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* Save xfd_err to guest_fpu before interrupt is enabled, so the
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* MSR value is not clobbered by the host activity before the guest
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* has chance to consume it.
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*
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* Do not blindly read xfd_err here, since this exception might
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* be caused by L1 interception on a platform which doesn't
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* support xfd at all.
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*
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* Do it conditionally upon guest_fpu::xfd. xfd_err matters
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* only when xfd contains a non-zero value.
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*
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* Queuing exception is done in vmx_handle_exit. See comment there.
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*/
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if (vcpu->arch.guest_fpu.fpstate->xfd)
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rdmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
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}
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static void handle_exception_nmi_irqoff(struct vcpu_vmx *vmx)
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{
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const unsigned long nmi_entry = (unsigned long)asm_exc_nmi_noist;
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@ -6407,6 +6452,9 @@ static void handle_exception_nmi_irqoff(struct vcpu_vmx *vmx)
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/* if exit due to PF check for async PF */
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if (is_page_fault(intr_info))
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vmx->vcpu.arch.apf.host_apf_flags = kvm_read_and_reset_apf_flags();
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/* if exit due to NM, handle before interrupts are enabled */
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else if (is_nm_fault(intr_info))
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handle_nm_fault_irqoff(&vmx->vcpu);
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/* Handle machine checks before interrupts are enabled */
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else if (is_machine_check(intr_info))
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kvm_machine_check();
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@ -9952,6 +9952,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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if (test_thread_flag(TIF_NEED_FPU_LOAD))
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switch_fpu_return();
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if (vcpu->arch.guest_fpu.xfd_err)
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wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
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if (unlikely(vcpu->arch.switch_db_regs)) {
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set_debugreg(0, 7);
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set_debugreg(vcpu->arch.eff_db[0], 0);
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@ -10015,6 +10018,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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static_call(kvm_x86_handle_exit_irqoff)(vcpu);
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if (vcpu->arch.guest_fpu.xfd_err)
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wrmsrl(MSR_IA32_XFD_ERR, 0);
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/*
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* Consume any pending interrupts, including the possible source of
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* VM-Exit on SVM and any ticks that occur between VM-Exit and now.
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