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arm64: dts: qcom: sm8450: Add tlmm nodes

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Add tlmm node found in SM8450 SoC and uart pin configuration

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-3-vkoul@kernel.org
This commit is contained in:
Vinod Koul 2021-12-15 10:04:31 +05:30 committed by Bjorn Andersson
parent 5188049c9b
commit ec950d5572
1 changed files with 28 additions and 0 deletions
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28
arch/arm64/boot/dts/qcom/sm8450.dtsi
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@ -343,6 +343,8 @@
reg = <0 0x0099c000 0 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@ -366,6 +368,32 @@
interrupt-controller;
};
tlmm: pinctrl@f100000 {
compatible = "qcom,sm8450-tlmm";
reg = <0 0x0f100000 0 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-ranges = <&tlmm 0 0 211>;
wakeup-parent = <&pdc>;
qup_uart7_rx: qup-uart7-rx {
pins = "gpio26";
function = "qup7";
drive-strength = <2>;
bias-disable;
};
qup_uart7_tx: qup-uart7-tx {
pins = "gpio27";
function = "qup7";
drive-strength = <2>;
bias-disable;
};
};
intc: interrupt-controller@17100000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;