S2IO: Removing MSI support from driver
- Removed MSI support from driver - unused feature - Replaced request_mem_region with pci_request_regions Signed-off-by: Veena Parat <veena.parat@neterion.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Veena Parat
Jeff Garzik
parent
6d517a27d5
commit
eccb8628ab
@ -37,7 +37,7 @@
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* tx_fifo_len: This too is an array of 8. Each element defines the number of
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* Tx descriptors that can be associated with each corresponding FIFO.
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* intr_type: This defines the type of interrupt. The values can be 0(INTA),
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* 1(MSI), 2(MSI_X). Default value is '0(INTA)'
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* 2(MSI_X). Default value is '0(INTA)'
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* lro: Specifies whether to enable Large Receive Offload (LRO) or not.
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* Possible values '1' for enable '0' for disable. Default is '0'
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* lro_max_pkts: This parameter defines maximum number of packets can be
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@ -426,7 +426,7 @@ S2IO_PARM_INT(bimodal, 0);
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S2IO_PARM_INT(l3l4hdr_size, 128);
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/* Frequency of Rx desc syncs expressed as power of 2 */
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S2IO_PARM_INT(rxsync_frequency, 3);
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/* Interrupt type. Values can be 0(INTA), 1(MSI), 2(MSI_X) */
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/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
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S2IO_PARM_INT(intr_type, 0);
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/* Large receive offload feature */
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S2IO_PARM_INT(lro, 0);
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@ -3662,56 +3662,6 @@ static void store_xmsi_data(struct s2io_nic *nic)
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}
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}
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int s2io_enable_msi(struct s2io_nic *nic)
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{
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struct XENA_dev_config __iomem *bar0 = nic->bar0;
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u16 msi_ctrl, msg_val;
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struct config_param *config = &nic->config;
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struct net_device *dev = nic->dev;
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u64 val64, tx_mat, rx_mat;
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int i, err;
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val64 = readq(&bar0->pic_control);
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val64 &= ~BIT(1);
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writeq(val64, &bar0->pic_control);
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err = pci_enable_msi(nic->pdev);
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if (err) {
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DBG_PRINT(ERR_DBG, "%s: enabling MSI failed\n",
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nic->dev->name);
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return err;
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}
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/*
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* Enable MSI and use MSI-1 in stead of the standard MSI-0
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* for interrupt handling.
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*/
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pci_read_config_word(nic->pdev, 0x4c, &msg_val);
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msg_val ^= 0x1;
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pci_write_config_word(nic->pdev, 0x4c, msg_val);
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pci_read_config_word(nic->pdev, 0x4c, &msg_val);
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pci_read_config_word(nic->pdev, 0x42, &msi_ctrl);
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msi_ctrl |= 0x10;
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pci_write_config_word(nic->pdev, 0x42, msi_ctrl);
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/* program MSI-1 into all usable Tx_Mat and Rx_Mat fields */
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tx_mat = readq(&bar0->tx_mat0_n[0]);
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for (i=0; i<config->tx_fifo_num; i++) {
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tx_mat |= TX_MAT_SET(i, 1);
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}
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writeq(tx_mat, &bar0->tx_mat0_n[0]);
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rx_mat = readq(&bar0->rx_mat);
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for (i=0; i<config->rx_ring_num; i++) {
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rx_mat |= RX_MAT_SET(i, 1);
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}
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writeq(rx_mat, &bar0->rx_mat);
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dev->irq = nic->pdev->irq;
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return 0;
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}
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static int s2io_enable_msi_x(struct s2io_nic *nic)
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{
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struct XENA_dev_config __iomem *bar0 = nic->bar0;
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@ -4117,39 +4067,6 @@ static int s2io_chk_rx_buffers(struct s2io_nic *sp, int rng_n)
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return 0;
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}
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static irqreturn_t s2io_msi_handle(int irq, void *dev_id)
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{
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struct net_device *dev = (struct net_device *) dev_id;
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struct s2io_nic *sp = dev->priv;
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int i;
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struct mac_info *mac_control;
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struct config_param *config;
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atomic_inc(&sp->isr_cnt);
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mac_control = &sp->mac_control;
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config = &sp->config;
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DBG_PRINT(INTR_DBG, "%s: MSI handler\n", __FUNCTION__);
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/* If Intr is because of Rx Traffic */
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for (i = 0; i < config->rx_ring_num; i++)
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rx_intr_handler(&mac_control->rings[i]);
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/* If Intr is because of Tx Traffic */
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for (i = 0; i < config->tx_fifo_num; i++)
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tx_intr_handler(&mac_control->fifos[i]);
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/*
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* If the Rx buffer count is below the panic threshold then
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* reallocate the buffers from the interrupt handler itself,
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* else schedule a tasklet to reallocate the buffers.
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*/
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for (i = 0; i < config->rx_ring_num; i++)
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s2io_chk_rx_buffers(sp, i);
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atomic_dec(&sp->isr_cnt);
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return IRQ_HANDLED;
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}
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static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
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{
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struct ring_info *ring = (struct ring_info *)dev_id;
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@ -6332,9 +6249,7 @@ static int s2io_add_isr(struct s2io_nic * sp)
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struct net_device *dev = sp->dev;
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int err = 0;
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if (sp->intr_type == MSI)
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ret = s2io_enable_msi(sp);
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else if (sp->intr_type == MSI_X)
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if (sp->intr_type == MSI_X)
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ret = s2io_enable_msi_x(sp);
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if (ret) {
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DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
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@ -6345,16 +6260,6 @@ static int s2io_add_isr(struct s2io_nic * sp)
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store_xmsi_data(sp);
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/* After proper initialization of H/W, register ISR */
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if (sp->intr_type == MSI) {
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err = request_irq((int) sp->pdev->irq, s2io_msi_handle,
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IRQF_SHARED, sp->name, dev);
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if (err) {
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pci_disable_msi(sp->pdev);
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DBG_PRINT(ERR_DBG, "%s: MSI registration failed\n",
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dev->name);
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return -1;
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}
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}
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if (sp->intr_type == MSI_X) {
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int i, msix_tx_cnt=0,msix_rx_cnt=0;
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@ -6441,14 +6346,6 @@ static void s2io_rem_isr(struct s2io_nic * sp)
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pci_disable_msix(sp->pdev);
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} else {
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free_irq(sp->pdev->irq, dev);
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if (sp->intr_type == MSI) {
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u16 val;
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pci_disable_msi(sp->pdev);
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pci_read_config_word(sp->pdev, 0x4c, &val);
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val ^= 0x1;
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pci_write_config_word(sp->pdev, 0x4c, val);
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}
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}
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/* Waiting till all Interrupt handlers are complete */
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cnt = 0;
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@ -6994,7 +6891,7 @@ static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type)
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*dev_intr_type = INTA;
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}
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#else
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if (*dev_intr_type > MSI_X) {
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if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
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DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. "
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"Defaulting to INTA\n");
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*dev_intr_type = INTA;
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@ -7103,28 +7000,10 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
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pci_disable_device(pdev);
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return -ENOMEM;
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}
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if (dev_intr_type != MSI_X) {
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if (pci_request_regions(pdev, s2io_driver_name)) {
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DBG_PRINT(ERR_DBG, "Request Regions failed\n");
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pci_disable_device(pdev);
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return -ENODEV;
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}
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}
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else {
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if (!(request_mem_region(pci_resource_start(pdev, 0),
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pci_resource_len(pdev, 0), s2io_driver_name))) {
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DBG_PRINT(ERR_DBG, "bar0 Request Regions failed\n");
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pci_disable_device(pdev);
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return -ENODEV;
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}
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if (!(request_mem_region(pci_resource_start(pdev, 2),
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pci_resource_len(pdev, 2), s2io_driver_name))) {
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DBG_PRINT(ERR_DBG, "bar1 Request Regions failed\n");
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release_mem_region(pci_resource_start(pdev, 0),
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pci_resource_len(pdev, 0));
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pci_disable_device(pdev);
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return -ENODEV;
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}
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if ((ret = pci_request_regions(pdev, s2io_driver_name))) {
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DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x \n", __FUNCTION__, ret);
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pci_disable_device(pdev);
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return -ENODEV;
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}
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dev = alloc_etherdev(sizeof(struct s2io_nic));
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@ -7434,9 +7313,6 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
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case INTA:
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DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
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break;
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case MSI:
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DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI\n", dev->name);
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break;
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case MSI_X:
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DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
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break;
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@ -7476,14 +7352,7 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
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mem_alloc_failed:
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free_shared_mem(sp);
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pci_disable_device(pdev);
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if (dev_intr_type != MSI_X)
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pci_release_regions(pdev);
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else {
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release_mem_region(pci_resource_start(pdev, 0),
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pci_resource_len(pdev, 0));
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release_mem_region(pci_resource_start(pdev, 2),
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pci_resource_len(pdev, 2));
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}
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pci_release_regions(pdev);
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pci_set_drvdata(pdev, NULL);
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free_netdev(dev);
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@ -7518,14 +7387,7 @@ static void __devexit s2io_rem_nic(struct pci_dev *pdev)
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free_shared_mem(sp);
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iounmap(sp->bar0);
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iounmap(sp->bar1);
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if (sp->intr_type != MSI_X)
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pci_release_regions(pdev);
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else {
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release_mem_region(pci_resource_start(pdev, 0),
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pci_resource_len(pdev, 0));
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release_mem_region(pci_resource_start(pdev, 2),
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pci_resource_len(pdev, 2));
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}
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pci_release_regions(pdev);
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pci_set_drvdata(pdev, NULL);
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free_netdev(dev);
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pci_disable_device(pdev);
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@ -875,7 +875,6 @@ struct s2io_nic {
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u16 lro_max_aggr_per_sess;
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#define INTA 0
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#define MSI 1
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#define MSI_X 2
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u8 intr_type;
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@ -1019,8 +1018,6 @@ static int s2io_poll(struct net_device *dev, int *budget);
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static void s2io_init_pci(struct s2io_nic * sp);
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static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
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static void s2io_alarm_handle(unsigned long data);
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static int s2io_enable_msi(struct s2io_nic *nic);
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static irqreturn_t s2io_msi_handle(int irq, void *dev_id);
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static irqreturn_t
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s2io_msix_ring_handle(int irq, void *dev_id);
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static irqreturn_t
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