scsi: ufs: ufs-mediatek: Support multiple VCC sources
Support multiple VCC sources in MediaTek UFS platforms. Two options are provided and distinguished by specific device tree attributes as below examples, [Option 1: By numbering] mediatek,ufs-vcc-by-num; vcc-opt1-supply = <&mt6373_vbuck4_ufs>; vcc-opt2-supply = <&mt6363_vemc>; [Option 2: By UFS version] mediatek,ufs-vcc-by-ver; vcc-ufs3-supply = <&mt6373_vbuck4_ufs>; Link: https://lore.kernel.org/r/20220616053725.5681-11-stanley.chu@mediatek.com Signed-off-by: Alice Chao <alice.chao@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -669,6 +669,49 @@ static u32 ufs_mtk_get_ufs_hci_version(struct ufs_hba *hba)
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return hba->ufs_version;
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}
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#define MAX_VCC_NAME 30
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static int ufs_mtk_vreg_fix_vcc(struct ufs_hba *hba)
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{
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struct ufs_vreg_info *info = &hba->vreg_info;
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struct device_node *np = hba->dev->of_node;
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struct device *dev = hba->dev;
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char vcc_name[MAX_VCC_NAME];
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struct arm_smccc_res res;
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int err, ver;
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if (hba->vreg_info.vcc)
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return 0;
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if (of_property_read_bool(np, "mediatek,ufs-vcc-by-num")) {
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ufs_mtk_get_vcc_num(res);
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if (res.a1 > UFS_VCC_NONE && res.a1 < UFS_VCC_MAX)
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snprintf(vcc_name, MAX_VCC_NAME, "vcc-opt%u", res.a1);
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else
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return -ENODEV;
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} else if (of_property_read_bool(np, "mediatek,ufs-vcc-by-ver")) {
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ver = (hba->dev_info.wspecversion & 0xF00) >> 8;
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snprintf(vcc_name, MAX_VCC_NAME, "vcc-ufs%u", ver);
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} else {
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return 0;
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}
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err = ufshcd_populate_vreg(dev, vcc_name, &info->vcc);
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if (err)
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return err;
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err = ufshcd_get_vreg(dev, info->vcc);
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if (err)
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return err;
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err = regulator_enable(info->vcc->reg);
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if (!err) {
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info->vcc->enabled = true;
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dev_info(dev, "%s: %s enabled\n", __func__, vcc_name);
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}
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return err;
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}
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/**
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* ufs_mtk_init - find other essential mmio bases
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* @hba: host controller instance
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@ -1179,7 +1222,6 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba)
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else
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ufs_mtk_setup_ref_clk_wait_us(hba,
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REFCLK_DEFAULT_WAIT_US);
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return 0;
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}
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@ -1197,6 +1239,8 @@ static void ufs_mtk_fixup_dev_quirks(struct ufs_hba *hba)
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hba->dev_quirks &= ~(UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
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UFS_DEVICE_QUIRK_DELAY_AFTER_LPM);
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}
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ufs_mtk_vreg_fix_vcc(hba);
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}
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static void ufs_mtk_event_notify(struct ufs_hba *hba,
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@ -83,6 +83,7 @@ enum {
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#define UFS_MTK_SIP_DEVICE_RESET BIT(1)
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#define UFS_MTK_SIP_CRYPTO_CTRL BIT(2)
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#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3)
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#define UFS_MTK_SIP_GET_VCC_NUM BIT(6)
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#define UFS_MTK_SIP_DEVICE_PWR_CTRL BIT(7)
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/*
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@ -144,6 +145,16 @@ struct ufs_mtk_host {
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u32 ip_ver;
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};
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/*
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* Multi-VCC by Numbering
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*/
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enum ufs_mtk_vcc_num {
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UFS_VCC_NONE = 0,
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UFS_VCC_1,
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UFS_VCC_2,
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UFS_VCC_MAX
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};
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/*
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* SMC call wrapper function
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*/
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@ -183,6 +194,9 @@ static void _ufs_mtk_smc(struct ufs_mtk_smc_arg s)
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#define ufs_mtk_device_reset_ctrl(high, res) \
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ufs_mtk_smc(UFS_MTK_SIP_DEVICE_RESET, &(res), high)
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#define ufs_mtk_get_vcc_num(res) \
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ufs_mtk_smc(UFS_MTK_SIP_GET_VCC_NUM, &(res))
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#define ufs_mtk_device_pwr_ctrl(on, ufs_ver, res) \
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ufs_mtk_smc(UFS_MTK_SIP_DEVICE_PWR_CTRL, &(res), on, ufs_ver)
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