iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/xe: Clarify 'gt' retrieval for primary tile

Browse Source 
There are a bunch of places in the driver where we need to perform
non-GT MMIO against the platform's primary tile (display code, top-level
interrupt enable/disable, driver initialization, etc.).  Rename
'to_gt()' to 'xe_primary_mmio_gt()' to clarify that we're trying to get
a primary MMIO handle for these top-level operations.

In the future we need to move away from xe_gt as the target for MMIO
operations (most of which are completely unrelated to GT).

v2:
 - s/xe_primary_mmio_gt/xe_root_mmio_gt/ for more consistency with how
   we refer to tile 0.  (Lucas)
v3:
 - Tweak comment on xe_root_mmio_gt().  (Lucas)

Acked-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230601215244.678611-16-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matt Roper 2023-06-01 14:52:28 -07:00 committed by Rodrigo Vivi
parent 08dea76745
commit ed006ba5e6
6 changed files with 21 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/xe/xe_device.c
View File

@ -355,7 +355,7 @@ static void device_kill_persistent_engines(struct xe_device *xe,
void xe_device_wmb(struct xe_device *xe)
{
struct xe_gt *gt = xe_device_get_gt(xe, 0);
struct xe_gt *gt = xe_root_mmio_gt(xe);
wmb();
if (IS_DGFX(xe))

13
drivers/gpu/drm/xe/xe_device.h
View File

@ -66,9 +66,18 @@ static inline struct xe_gt *xe_device_get_gt(struct xe_device *xe, u8 gt_id)
}
/*
* FIXME: Placeholder until multi-gt lands. Once that lands, kill this function.
* Provide a GT structure suitable for performing non-GT MMIO operations against
* the primary tile. Primarily intended for early tile initialization, display
* handling, top-most interrupt enable/disable, etc. Since anything using the
* MMIO handle returned by this function doesn't need GSI offset translation,
* we'll return the primary GT from the root tile.
*
* FIXME: Fix the driver design so that 'gt' isn't the target of all MMIO
* operations.
*
* Returns the primary gt of the root tile.
*/
static inline struct xe_gt *to_gt(struct xe_device *xe)
static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
{
return &xe_device_get_root_tile(xe)->primary_gt;
}

6
drivers/gpu/drm/xe/xe_irq.c
View File

@ -284,7 +284,7 @@ static void gt_irq_handler(struct xe_device *xe, struct xe_gt *gt,
static irqreturn_t xelp_irq_handler(int irq, void *arg)
{
struct xe_device *xe = arg;
struct xe_gt *gt = xe_device_get_gt(xe, 0); /* Only 1 GT here */
struct xe_gt *gt = xe_root_mmio_gt(xe);
u32 master_ctl, gu_misc_iir;
long unsigned int intr_dw[2];
u32 identity[32];
@ -306,7 +306,7 @@ static irqreturn_t xelp_irq_handler(int irq, void *arg)
static u32 dg1_intr_disable(struct xe_device *xe)
{
struct xe_gt *gt = xe_device_get_gt(xe, 0);
struct xe_gt *gt = xe_root_mmio_gt(xe);
u32 val;
/* First disable interrupts */
@ -324,7 +324,7 @@ static u32 dg1_intr_disable(struct xe_device *xe)
static void dg1_intr_enable(struct xe_device *xe, bool stall)
{
struct xe_gt *gt = xe_device_get_gt(xe, 0);
struct xe_gt *gt = xe_root_mmio_gt(xe);
xe_mmio_write32(gt, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ);
if (stall)

6
drivers/gpu/drm/xe/xe_mmio.c
View File

@ -328,7 +328,7 @@ int xe_mmio_probe_vram(struct xe_device *xe)
static void xe_mmio_probe_tiles(struct xe_device *xe)
{
struct xe_gt *gt = &xe_device_get_root_tile(xe)->primary_gt;
struct xe_gt *gt = xe_root_mmio_gt(xe);
u32 mtcfg;
u8 adj_tile_count;
u8 id;
@ -380,7 +380,7 @@ static void mmio_fini(struct drm_device *drm, void *arg)
int xe_mmio_init(struct xe_device *xe)
{
struct xe_tile *root_tile = xe_device_get_root_tile(xe);
struct xe_gt *gt = xe_device_get_gt(xe, 0);
struct xe_gt *gt = xe_root_mmio_gt(xe);
const int mmio_bar = 0;
int err;
@ -439,7 +439,7 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
{
struct xe_device *xe = to_xe_device(dev);
struct xe_gt *gt = xe_device_get_gt(xe, 0);
struct xe_gt *gt = xe_root_mmio_gt(xe);
struct drm_xe_mmio *args = data;
unsigned int bits_flag, bytes;
struct xe_reg reg;

2
drivers/gpu/drm/xe/xe_query.c
View File

@ -259,7 +259,7 @@ static int query_gts(struct xe_device *xe, struct drm_xe_device_query *query)
static int query_hwconfig(struct xe_device *xe,
struct drm_xe_device_query *query)
{
struct xe_gt *gt = xe_device_get_gt(xe, 0);
struct xe_gt *gt = xe_root_mmio_gt(xe);
size_t size = xe_guc_hwconfig_size(&gt->uc.guc);
void __user *query_ptr = u64_to_user_ptr(query->data);
void *hwconfig;

4
drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c
View File

@ -54,7 +54,7 @@ bool xe_ttm_stolen_cpu_access_needs_ggtt(struct xe_device *xe)
static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr)
{
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_gt *mmio = &tile->primary_gt;
struct xe_gt *mmio = xe_root_mmio_gt(xe);
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
u64 stolen_size;
u64 tile_offset;
@ -92,7 +92,7 @@ static u32 detect_bar2_integrated(struct xe_device *xe, struct xe_ttm_stolen_mgr
u32 stolen_size;
u32 ggc, gms;
ggc = xe_mmio_read32(to_gt(xe), GGC);
ggc = xe_mmio_read32(xe_root_mmio_gt(xe), GGC);
/* check GGMS, should be fixed 0x3 (8MB) */
if (drm_WARN_ON(&xe->drm, (ggc & GGMS_MASK) != GGMS_MASK))