ASoC: SOF: Adding amd HS functionality to the sof core
Add I2S HS control instance to the sof core. This will help the amd topology to use the I2S HS Dai. Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20220913144319.1055302-4-Vsujithkumar.Reddy@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -84,6 +84,7 @@ enum sof_ipc_dai_type {
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SOF_DAI_AMD_BT, /**< AMD ACP BT*/
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SOF_DAI_AMD_SP, /**< AMD ACP SP */
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SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */
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SOF_DAI_AMD_HS, /**< Amd HS */
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SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */
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};
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@ -112,6 +113,7 @@ struct sof_ipc_dai_config {
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struct sof_ipc_dai_acp_params acpbt;
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struct sof_ipc_dai_acp_params acpsp;
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struct sof_ipc_dai_acpdmic_params acpdmic;
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struct sof_ipc_dai_acp_params acphs;
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struct sof_ipc_dai_mtk_afe_params afe;
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};
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} __packed;
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@ -346,6 +346,15 @@ static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd,
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dev_dbg(component->dev, "AMD_SP channels_min: %d channels_max: %d\n",
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channels->min, channels->max);
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break;
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case SOF_DAI_AMD_HS:
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rate->min = private->dai_config->acphs.fsync_rate;
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rate->max = private->dai_config->acphs.fsync_rate;
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channels->min = private->dai_config->acphs.tdm_slots;
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channels->max = private->dai_config->acphs.tdm_slots;
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dev_dbg(component->dev,
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"AMD_HS channel_max: %d rate_max: %d\n", channels->max, rate->max);
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break;
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case SOF_DAI_AMD_DMIC:
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rate->min = private->dai_config->acpdmic.pdm_rate;
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rate->max = private->dai_config->acpdmic.pdm_rate;
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@ -1217,6 +1217,36 @@ static int sof_link_acp_sp_load(struct snd_soc_component *scomp, struct snd_sof_
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return 0;
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}
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static int sof_link_acp_hs_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink,
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struct sof_ipc_dai_config *config, struct snd_sof_dai *dai)
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{
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struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
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struct sof_dai_private_data *private = dai->private;
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u32 size = sizeof(*config);
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/* Configures the DAI hardware format and inverted clocks */
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sof_dai_set_format(hw_config, config);
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/* init IPC */
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memset(&config->acphs, 0, sizeof(config->acphs));
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config->hdr.size = size;
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config->acphs.fsync_rate = le32_to_cpu(hw_config->fsync_rate);
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config->acphs.tdm_slots = le32_to_cpu(hw_config->tdm_slots);
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dev_info(scomp->dev, "ACP_HS config ACP%d channel %d rate %d\n",
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config->dai_index, config->acphs.tdm_slots,
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config->acphs.fsync_rate);
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dai->number_configs = 1;
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dai->current_config = 0;
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private->dai_config = kmemdup(config, size, GFP_KERNEL);
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if (!private->dai_config)
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return -ENOMEM;
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return 0;
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}
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static int sof_link_afe_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink,
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struct sof_ipc_dai_config *config, struct snd_sof_dai *dai)
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{
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@ -1517,6 +1547,9 @@ static int sof_ipc3_widget_setup_comp_dai(struct snd_sof_widget *swidget)
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case SOF_DAI_AMD_SP:
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ret = sof_link_acp_sp_load(scomp, slink, config, dai);
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break;
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case SOF_DAI_AMD_HS:
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ret = sof_link_acp_hs_load(scomp, slink, config, dai);
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break;
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case SOF_DAI_AMD_DMIC:
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ret = sof_link_acp_dmic_load(scomp, slink, config, dai);
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break;
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@ -287,6 +287,7 @@ static const struct sof_dai_types sof_dais[] = {
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{"ACP", SOF_DAI_AMD_BT},
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{"ACPSP", SOF_DAI_AMD_SP},
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{"ACPDMIC", SOF_DAI_AMD_DMIC},
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{"ACPHS", SOF_DAI_AMD_HS},
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{"AFE", SOF_DAI_MEDIATEK_AFE},
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};
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