Renesas DT binding updates for v6.3
- Document support for the Renesas RZ/V2M External Power Sequence Controller (PWC). -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCY9ORtAAKCRCKwlD9ZEnx cAcfAPwOEfgSSAbC01T9A+Yg/53F19CKMkBvQI5qkAGeRCcfvgD+JrMJUYjD9J0Y 9X56SAGowDq+dElFiMisnnhq+qv31gw= =jKk1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX+oQACgkQmmx57+YA GNmRBw/9GSqd0IhLxjLD35XcP+VKCPd7CSsSjLfnWXyGarhlax6+KqVePqUg4t83 piSJM++K6CXtnU4Im2MCp8fsCGypRPKiYV0/e0Y2E0lgtYd/hxYseGe4X1lpyN5u bFD7q9ANPljKsBn49Bs8pNVhM+2HJHNNkqCcDE21o4wUp+XUx1g8vMzoAPRXnlQ0 v9gW28XP/br0MtGZUYJ0d28aokk7eWzQiHTv2UITj4jLtsFiatRPbFHUfn+c2nk8 lWIgKKQj8suCYOEioGEpzy1OYcUeAhuE6MPhLFpoYcdR4PtlYe8n2NOb5Cgj4Tmw 9kz2t1TeFCrCGaOAb3nd0+L2RqdVpPFzxIlRD5EAt7R0ZkCY9fLt60dVXCyWBfNq bmrDFAEJX0vp+qLpZC2Fwp6EaOIMw+2LrTv7LodQv5DDZ2E1xwFZyRbcLtgwuUvH JVu3in6ndvE29mCDKw8kaCIPDlsdL2opLnm5CjCMYAc/fvbtiW0AfnurXE8t9ImB eGxnRc4JlhbgYvQ0w3+qWoe3YBhV6uaYOhxeIzX2vWHCSapIKcQjMlms2w8CD0Nk ivFkIqYGI3XMy1zVpPj7WE1Hg0zMNOtjPBF5sqFFpnoX0fCKL6dAoSUP8en9QRiK SDHerD5V/e03UtY+9u/j8av5z/fDpPiCRtdj7xxpCt3kd5c6M5k= =cbob -----END PGP SIGNATURE----- Merge tag 'renesas-dt-bindings-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v6.3 - Document support for the Renesas RZ/V2M External Power Sequence Controller (PWC). * tag 'renesas-dt-bindings-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: soc: renesas: Add RZ/V2M PWC Link: https://lore.kernel.org/r/cover.1674815097.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/V2M External Power Sequence Controller (PWC)
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description: |+
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The PWC IP found in the RZ/V2M family of chips comes with the below
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capabilities
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- external power supply on/off sequence generation
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- on/off signal generation for the LPDDR4 core power supply (LPVDD)
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- key input signals processing
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- general-purpose output pins
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maintainers:
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- Fabrizio Castro <fabrizio.castro.jz@renesas.com>
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a09g011-pwc # RZ/V2M
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- renesas,r9a09g055-pwc # RZ/V2MA
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- const: renesas,rzv2m-pwc
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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renesas,rzv2m-pwc-power:
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description: The PWC is used to control the system power supplies.
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type: boolean
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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additionalProperties: false
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examples:
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- |
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pwc: pwc@a3700000 {
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compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
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reg = <0xa3700000 0x800>;
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gpio-controller;
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#gpio-cells = <2>;
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renesas,rzv2m-pwc-power;
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};
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