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net: dsa: mv88e6xxx: Pass mii_bus to all PHY operations

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In preparation for supporting multiple MDIO busses, pass the mii_bus
structure to all PHY operations. It will in future then be clear on
which MDIO bus the operation should be performed.

For reads/write from phylib, the mii_bus is readily available. However
some internal code also access the PHY, e.g. for EEE and SERDES. Make
this code use the one and only currently available MDIO bus.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Andrew Lunn
2017-01-24 14:53:48 +01:00
committed by David S. Miller
parent efb3e74da2
commit ee26a2284b
4 changed files with 50 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

42
drivers/net/dsa/mv88e6xxx/chip.c
View File

@@ -222,14 +222,16 @@ int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val)
return 0; return 0;
} }
static int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, int addr, static int mv88e6165_phy_read(struct mv88e6xxx_chip *chip,
int reg, u16 *val) struct mii_bus *bus,
int addr, int reg, u16 *val)
{ {
return mv88e6xxx_read(chip, addr, reg, val); return mv88e6xxx_read(chip, addr, reg, val);
} }
static int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, int addr, static int mv88e6165_phy_write(struct mv88e6xxx_chip *chip,
int reg, u16 val) struct mii_bus *bus,
int addr, int reg, u16 val)
{ {
return mv88e6xxx_write(chip, addr, reg, val); return mv88e6xxx_write(chip, addr, reg, val);
} }
@@ -238,22 +240,30 @@ static int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,
int reg, u16 *val) int reg, u16 *val)
{ {
int addr = phy; /* PHY devices addresses start at 0x0 */ int addr = phy; /* PHY devices addresses start at 0x0 */
struct mii_bus *bus = chip->mdio_bus;
if (!chip->info->ops->phy_read) if (!chip->info->ops->phy_read)
return -EOPNOTSUPP; return -EOPNOTSUPP;
return chip->info->ops->phy_read(chip, addr, reg, val); if (!bus)
return -EOPNOTSUPP;
return chip->info->ops->phy_read(chip, bus, addr, reg, val);
} }
static int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, static int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,
int reg, u16 val) int reg, u16 val)
{ {
int addr = phy; /* PHY devices addresses start at 0x0 */ int addr = phy; /* PHY devices addresses start at 0x0 */
struct mii_bus *bus = chip->mdio_bus;
if (!chip->info->ops->phy_write) if (!chip->info->ops->phy_write)
return -EOPNOTSUPP; return -EOPNOTSUPP;
return chip->info->ops->phy_write(chip, addr, reg, val); if (!bus)
return -EOPNOTSUPP;
return chip->info->ops->phy_write(chip, bus, addr, reg, val);
} }
static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page) static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
@@ -623,8 +633,9 @@ static void mv88e6xxx_ppu_state_destroy(struct mv88e6xxx_chip *chip)
del_timer_sync(&chip->ppu_timer); del_timer_sync(&chip->ppu_timer);
} }
static int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip, int addr, static int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip,
int reg, u16 *val) struct mii_bus *bus,
int addr, int reg, u16 *val)
{ {
int err; int err;
@@ -637,8 +648,9 @@ static int mv88e6xxx_phy_ppu_read(struct mv88e6xxx_chip *chip, int addr,
return err; return err;
} }
static int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip, int addr, static int mv88e6xxx_phy_ppu_write(struct mv88e6xxx_chip *chip,
int reg, u16 val) struct mii_bus *bus,
int addr, int reg, u16 val)
{ {
int err; int err;
@@ -2897,8 +2909,11 @@ static int mv88e6xxx_mdio_read(struct mii_bus *bus, int phy, int reg)
if (phy >= mv88e6xxx_num_ports(chip)) if (phy >= mv88e6xxx_num_ports(chip))
return 0xffff; return 0xffff;
if (!chip->info->ops->phy_read)
return -EOPNOTSUPP;
mutex_lock(&chip->reg_lock); mutex_lock(&chip->reg_lock);
err = mv88e6xxx_phy_read(chip, phy, reg, &val); err = chip->info->ops->phy_read(chip, bus, phy, reg, &val);
mutex_unlock(&chip->reg_lock); mutex_unlock(&chip->reg_lock);
return err ? err : val; return err ? err : val;
@@ -2912,8 +2927,11 @@ static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)
if (phy >= mv88e6xxx_num_ports(chip)) if (phy >= mv88e6xxx_num_ports(chip))
return 0xffff; return 0xffff;
if (!chip->info->ops->phy_write)
return -EOPNOTSUPP;
mutex_lock(&chip->reg_lock); mutex_lock(&chip->reg_lock);
err = mv88e6xxx_phy_write(chip, phy, reg, val); err = chip->info->ops->phy_write(chip, bus, phy, reg, val);
mutex_unlock(&chip->reg_lock); mutex_unlock(&chip->reg_lock);
return err; return err;

10
drivers/net/dsa/mv88e6xxx/global2.c
View File

@@ -501,8 +501,9 @@ static int mv88e6xxx_g2_smi_phy_cmd(struct mv88e6xxx_chip *chip, u16 cmd)
return mv88e6xxx_g2_smi_phy_wait(chip); return mv88e6xxx_g2_smi_phy_wait(chip);
} }
int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, int addr, int reg, int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip,
u16 *val) struct mii_bus *bus,
int addr, int reg, u16 *val)
{ {
u16 cmd = GLOBAL2_SMI_PHY_CMD_OP_22_READ_DATA | (addr << 5) | reg; u16 cmd = GLOBAL2_SMI_PHY_CMD_OP_22_READ_DATA | (addr << 5) | reg;
int err; int err;
@@ -518,8 +519,9 @@ int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, int addr, int reg,
return mv88e6xxx_g2_read(chip, GLOBAL2_SMI_PHY_DATA, val); return mv88e6xxx_g2_read(chip, GLOBAL2_SMI_PHY_DATA, val);
} }
int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, int addr, int reg, int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip,
u16 val) struct mii_bus *bus,
int addr, int reg, u16 val)
{ {
u16 cmd = GLOBAL2_SMI_PHY_CMD_OP_22_WRITE_DATA | (addr << 5) | reg; u16 cmd = GLOBAL2_SMI_PHY_CMD_OP_22_WRITE_DATA | (addr << 5) | reg;
int err; int err;

12
drivers/net/dsa/mv88e6xxx/global2.h
View File

@@ -23,10 +23,12 @@ static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
return 0; return 0;
} }
int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, int addr, int reg, int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip,
u16 *val); struct mii_bus *bus,
int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, int addr, int reg, int addr, int reg, u16 *val);
u16 val); int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int reg, u16 val);
int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr); int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);
int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip, int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,
@@ -57,12 +59,14 @@ static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
} }
static inline int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip, static inline int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int reg, u16 *val) int addr, int reg, u16 *val)
{ {
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
static inline int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip, static inline int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int reg, u16 val) int addr, int reg, u16 val)
{ {
return -EOPNOTSUPP; return -EOPNOTSUPP;

10
drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
View File

@@ -758,10 +758,12 @@ struct mv88e6xxx_ops {
int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr); int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr);
int (*phy_read)(struct mv88e6xxx_chip *chip, int addr, int reg, int (*phy_read)(struct mv88e6xxx_chip *chip,
u16 *val); struct mii_bus *bus,
int (*phy_write)(struct mv88e6xxx_chip *chip, int addr, int reg, int addr, int reg, u16 *val);
u16 val); int (*phy_write)(struct mv88e6xxx_chip *chip,
struct mii_bus *bus,
int addr, int reg, u16 val);
/* PHY Polling Unit (PPU) operations */ /* PHY Polling Unit (PPU) operations */
int (*ppu_enable)(struct mv88e6xxx_chip *chip); int (*ppu_enable)(struct mv88e6xxx_chip *chip);