cpufreq: brcmstb-avs-cpufreq: remove development debug support
This debug code was helpful while developing the driver, but it isn't being used for anything anymore. Signed-off-by: Markus Mayer <mmayer@broadcom.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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6d08b06e67
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ee53a65dc7
@ -71,16 +71,6 @@ config ARM_BRCMSTB_AVS_CPUFREQ
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Say Y, if you have a Broadcom SoC with AVS support for DFS or DVFS.
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config ARM_BRCMSTB_AVS_CPUFREQ_DEBUG
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bool "Broadcom STB AVS CPUfreq driver sysfs debug capability"
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depends on ARM_BRCMSTB_AVS_CPUFREQ
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help
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Enabling this option turns on debug support via sysfs under
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/sys/kernel/debug/brcmstb-avs-cpufreq. It is possible to read all and
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write some AVS mailbox registers through sysfs entries.
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If in doubt, say N.
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config ARM_EXYNOS5440_CPUFREQ
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tristate "SAMSUNG EXYNOS5440"
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depends on SOC_EXYNOS5440
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@ -49,13 +49,6 @@
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#include <linux/platform_device.h>
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#include <linux/semaphore.h>
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#ifdef CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG
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#include <linux/ctype.h>
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#include <linux/debugfs.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#endif
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/* Max number of arguments AVS calls take */
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#define AVS_MAX_CMD_ARGS 4
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/*
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@ -182,88 +175,11 @@ struct private_data {
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void __iomem *base;
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void __iomem *avs_intr_base;
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struct device *dev;
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#ifdef CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG
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struct dentry *debugfs;
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#endif
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struct completion done;
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struct semaphore sem;
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struct pmap pmap;
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};
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#ifdef CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG
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enum debugfs_format {
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DEBUGFS_NORMAL,
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DEBUGFS_FLOAT,
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DEBUGFS_REV,
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};
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struct debugfs_data {
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struct debugfs_entry *entry;
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struct private_data *priv;
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};
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struct debugfs_entry {
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char *name;
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u32 offset;
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fmode_t mode;
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enum debugfs_format format;
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};
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#define DEBUGFS_ENTRY(name, mode, format) { \
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#name, AVS_MBOX_##name, mode, format \
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}
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/*
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* These are used for debugfs only. Otherwise we use AVS_MBOX_PARAM() directly.
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*/
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#define AVS_MBOX_PARAM1 AVS_MBOX_PARAM(0)
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#define AVS_MBOX_PARAM2 AVS_MBOX_PARAM(1)
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#define AVS_MBOX_PARAM3 AVS_MBOX_PARAM(2)
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#define AVS_MBOX_PARAM4 AVS_MBOX_PARAM(3)
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/*
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* This table stores the name, access permissions and offset for each hardware
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* register and is used to generate debugfs entries.
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*/
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static struct debugfs_entry debugfs_entries[] = {
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DEBUGFS_ENTRY(COMMAND, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(STATUS, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(VOLTAGE0, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(TEMP0, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(PV0, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(MV0, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(PARAM1, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(PARAM2, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(PARAM3, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(PARAM4, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(REVISION, 0, DEBUGFS_REV),
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DEBUGFS_ENTRY(PSTATE, 0, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(HEARTBEAT, 0, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(MAGIC, S_IWUSR, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(SIGMA_HVT, 0, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(SIGMA_SVT, 0, DEBUGFS_NORMAL),
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DEBUGFS_ENTRY(VOLTAGE1, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(TEMP1, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(PV1, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(MV1, 0, DEBUGFS_FLOAT),
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DEBUGFS_ENTRY(FREQUENCY, 0, DEBUGFS_NORMAL),
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};
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static int brcm_avs_target_index(struct cpufreq_policy *, unsigned int);
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static char *__strtolower(char *s)
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{
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char *p;
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for (p = s; *p; p++)
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*p = tolower(*p);
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return s;
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}
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#endif /* CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG */
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static void __iomem *__map_region(const char *name)
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{
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struct device_node *np;
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@ -516,238 +432,6 @@ brcm_avs_get_freq_table(struct device *dev, struct private_data *priv)
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return table;
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}
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#ifdef CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG
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#define MANT(x) (unsigned int)(abs((x)) / 1000)
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#define FRAC(x) (unsigned int)(abs((x)) - abs((x)) / 1000 * 1000)
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static int brcm_avs_debug_show(struct seq_file *s, void *data)
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{
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struct debugfs_data *dbgfs = s->private;
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void __iomem *base;
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u32 val, offset;
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if (!dbgfs) {
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seq_puts(s, "No device pointer\n");
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return 0;
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}
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base = dbgfs->priv->base;
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offset = dbgfs->entry->offset;
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val = readl(base + offset);
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switch (dbgfs->entry->format) {
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case DEBUGFS_NORMAL:
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seq_printf(s, "%u\n", val);
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break;
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case DEBUGFS_FLOAT:
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seq_printf(s, "%d.%03d\n", MANT(val), FRAC(val));
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break;
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case DEBUGFS_REV:
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seq_printf(s, "%c.%c.%c.%c\n", (val >> 24 & 0xff),
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(val >> 16 & 0xff), (val >> 8 & 0xff),
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val & 0xff);
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break;
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}
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seq_printf(s, "0x%08x\n", val);
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return 0;
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}
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#undef MANT
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#undef FRAC
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static ssize_t brcm_avs_seq_write(struct file *file, const char __user *buf,
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size_t size, loff_t *ppos)
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{
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struct seq_file *s = file->private_data;
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struct debugfs_data *dbgfs = s->private;
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struct private_data *priv = dbgfs->priv;
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void __iomem *base, *avs_intr_base;
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bool use_issue_command = false;
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unsigned long val, offset;
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char str[128];
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int ret;
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char *str_ptr = str;
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if (size >= sizeof(str))
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return -E2BIG;
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memset(str, 0, sizeof(str));
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ret = copy_from_user(str, buf, size);
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if (ret)
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return ret;
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base = priv->base;
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avs_intr_base = priv->avs_intr_base;
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offset = dbgfs->entry->offset;
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/*
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* Special case writing to "command" entry only: if the string starts
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* with a 'c', we use the driver's __issue_avs_command() function.
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* Otherwise, we perform a raw write. This should allow testing of raw
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* access as well as using the higher level function. (Raw access
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* doesn't clear the firmware return status after issuing the command.)
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*/
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if (str_ptr[0] == 'c' && offset == AVS_MBOX_COMMAND) {
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use_issue_command = true;
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str_ptr++;
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}
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if (kstrtoul(str_ptr, 0, &val) != 0)
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return -EINVAL;
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/*
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* Setting the P-state is a special case. We need to update the CPU
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* frequency we report.
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*/
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if (val == AVS_CMD_SET_PSTATE) {
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struct cpufreq_policy *policy;
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unsigned int pstate;
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policy = cpufreq_cpu_get(smp_processor_id());
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/* Read back the P-state we are about to set */
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pstate = readl(base + AVS_MBOX_PARAM(0));
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if (use_issue_command) {
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ret = brcm_avs_target_index(policy, pstate);
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return ret ? ret : size;
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}
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policy->cur = policy->freq_table[pstate].frequency;
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}
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if (use_issue_command) {
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ret = __issue_avs_command(priv, val, false, NULL);
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} else {
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/* Locking here is not perfect, but is only for debug. */
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ret = down_interruptible(&priv->sem);
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if (ret)
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return ret;
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writel(val, base + offset);
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/* We have to wake up the firmware to process a command. */
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if (offset == AVS_MBOX_COMMAND)
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writel(AVS_CPU_L2_INT_MASK,
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avs_intr_base + AVS_CPU_L2_SET0);
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up(&priv->sem);
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}
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return ret ? ret : size;
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}
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static struct debugfs_entry *__find_debugfs_entry(const char *name)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(debugfs_entries); i++)
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if (strcasecmp(debugfs_entries[i].name, name) == 0)
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return &debugfs_entries[i];
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return NULL;
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}
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static int brcm_avs_debug_open(struct inode *inode, struct file *file)
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{
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struct debugfs_data *data;
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fmode_t fmode;
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int ret;
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/*
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* seq_open(), which is called by single_open(), clears "write" access.
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* We need write access to some files, so we preserve our access mode
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* and restore it.
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*/
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fmode = file->f_mode;
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/*
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* Check access permissions even for root. We don't want to be writing
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* to read-only registers. Access for regular users has already been
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* checked by the VFS layer.
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*/
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if ((fmode & FMODE_WRITER) && !(inode->i_mode & S_IWUSR))
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return -EACCES;
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data = kmalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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/*
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* We use the same file system operations for all our debug files. To
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* produce specific output, we look up the file name upon opening a
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* debugfs entry and map it to a memory offset. This offset is then used
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* in the generic "show" function to read a specific register.
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*/
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data->entry = __find_debugfs_entry(file->f_path.dentry->d_iname);
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data->priv = inode->i_private;
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ret = single_open(file, brcm_avs_debug_show, data);
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if (ret)
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kfree(data);
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file->f_mode = fmode;
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return ret;
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}
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static int brcm_avs_debug_release(struct inode *inode, struct file *file)
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{
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struct seq_file *seq_priv = file->private_data;
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struct debugfs_data *data = seq_priv->private;
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kfree(data);
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return single_release(inode, file);
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}
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static const struct file_operations brcm_avs_debug_ops = {
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.open = brcm_avs_debug_open,
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.read = seq_read,
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.write = brcm_avs_seq_write,
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.llseek = seq_lseek,
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.release = brcm_avs_debug_release,
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};
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static void brcm_avs_cpufreq_debug_init(struct platform_device *pdev)
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{
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struct private_data *priv = platform_get_drvdata(pdev);
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struct dentry *dir;
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int i;
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if (!priv)
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return;
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dir = debugfs_create_dir(BRCM_AVS_CPUFREQ_NAME, NULL);
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if (IS_ERR_OR_NULL(dir))
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return;
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priv->debugfs = dir;
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for (i = 0; i < ARRAY_SIZE(debugfs_entries); i++) {
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/*
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* The DEBUGFS_ENTRY macro generates uppercase strings. We
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* convert them to lowercase before creating the debugfs
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* entries.
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*/
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char *entry = __strtolower(debugfs_entries[i].name);
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fmode_t mode = debugfs_entries[i].mode;
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if (!debugfs_create_file(entry, S_IFREG | S_IRUGO | mode,
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dir, priv, &brcm_avs_debug_ops)) {
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priv->debugfs = NULL;
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debugfs_remove_recursive(dir);
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break;
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}
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}
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}
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static void brcm_avs_cpufreq_debug_exit(struct platform_device *pdev)
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{
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struct private_data *priv = platform_get_drvdata(pdev);
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if (priv && priv->debugfs) {
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debugfs_remove_recursive(priv->debugfs);
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priv->debugfs = NULL;
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}
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}
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#else
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static void brcm_avs_cpufreq_debug_init(struct platform_device *pdev) {}
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static void brcm_avs_cpufreq_debug_exit(struct platform_device *pdev) {}
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#endif /* CONFIG_ARM_BRCMSTB_AVS_CPUFREQ_DEBUG */
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/*
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* To ensure the right firmware is running we need to
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* - check the MAGIC matches what we expect
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@ -1016,11 +700,8 @@ static int brcm_avs_cpufreq_probe(struct platform_device *pdev)
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return ret;
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brcm_avs_driver.driver_data = pdev;
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ret = cpufreq_register_driver(&brcm_avs_driver);
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if (!ret)
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brcm_avs_cpufreq_debug_init(pdev);
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return ret;
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return cpufreq_register_driver(&brcm_avs_driver);
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}
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static int brcm_avs_cpufreq_remove(struct platform_device *pdev)
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@ -1032,8 +713,6 @@ static int brcm_avs_cpufreq_remove(struct platform_device *pdev)
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if (ret)
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return ret;
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brcm_avs_cpufreq_debug_exit(pdev);
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priv = platform_get_drvdata(pdev);
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iounmap(priv->base);
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iounmap(priv->avs_intr_base);
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