iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/i915/display: Clean up zero initializers

Browse Source 
Just use a simple {} to zero initialize arrays/structs instead
of the hodgepodge of stuff we are using currently.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231012122442.15718-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2023-10-12 15:24:37 +03:00
parent 02c8d561db
commit eebc1525ba
10 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/display/intel_acpi.c
View File

@ -153,7 +153,7 @@ static acpi_handle intel_dsm_pci_probe(struct pci_dev *pdev)
static bool intel_dsm_detect(void)
{
acpi_handle dhandle = NULL;
char acpi_method_name[255] = { 0 };
char acpi_method_name[255] = {};
struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};
struct pci_dev *pdev = NULL;
int vga_count = 0;

2
drivers/gpu/drm/i915/display/intel_cx0_phy.c
View File

@ -3009,7 +3009,7 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_c10pll_state mpllb_hw_state = { 0 };
struct intel_c10pll_state mpllb_hw_state = {};
const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
struct intel_encoder *encoder;
enum phy phy;

6
drivers/gpu/drm/i915/display/intel_dp.c
View File

@ -1583,7 +1583,7 @@ int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector,
{
struct drm_i915_private *i915 = to_i915(connector->base.dev);
int i, num_bpc;
u8 dsc_bpc[3] = {0};
u8 dsc_bpc[3] = {};
u8 dsc_max_bpc;
dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915);
@ -2006,7 +2006,7 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
u8 max_req_bpc = conn_state->max_requested_bpc;
u8 dsc_max_bpc, dsc_max_bpp;
u8 dsc_min_bpc, dsc_min_bpp;
u8 dsc_bpc[3] = {0};
u8 dsc_bpc[3] = {};
int forced_bpp, pipe_bpp;
int num_bpc, i, ret;
@ -2940,7 +2940,7 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
u8 oui[] = { 0x00, 0xaa, 0x01 };
u8 buf[3] = { 0 };
u8 buf[3] = {};
/*
* During driver init, we want to be careful and avoid changing the source OUI if it's

4
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
View File

@ -169,7 +169,7 @@ intel_dp_aux_hdr_get_backlight(struct intel_connector *connector, enum pipe pipe
struct intel_panel *panel = &connector->panel;
struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
u8 tmp;
u8 buf[2] = { 0 };
u8 buf[2] = {};
if (drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp) != 1) {
drm_err(&i915->drm, "[CONNECTOR:%d:%s] Failed to read current backlight mode from DPCD\n",
@ -204,7 +204,7 @@ intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state,
struct intel_connector *connector = to_intel_connector(conn_state->connector);
struct drm_device *dev = connector->base.dev;
struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
u8 buf[4] = { 0 };
u8 buf[4] = {};
buf[0] = level & 0xFF;
buf[1] = (level & 0xFF00) >> 8;

2
drivers/gpu/drm/i915/display/intel_dp_mst.c
View File

@ -192,7 +192,7 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
&crtc_state->hw.adjusted_mode;
int slots = -EINVAL;
int i, num_bpc;
u8 dsc_bpc[3] = {0};
u8 dsc_bpc[3] = {};
int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
u8 dsc_max_bpc;
bool need_timeslot_recalc = false;

2
drivers/gpu/drm/i915/display/intel_gmbus.c
View File

@ -781,7 +781,7 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
struct intel_gmbus *bus = to_intel_gmbus(adapter);
struct drm_i915_private *i915 = bus->i915;
u8 cmd = DRM_HDCP_DDC_AKSV;
u8 buf[DRM_HDCP_KSV_LEN] = { 0 };
u8 buf[DRM_HDCP_KSV_LEN] = {};
struct i2c_msg msgs[] = {
{
.addr = DRM_HDCP_DDC_ADDR,

2
drivers/gpu/drm/i915/display/intel_plane_initial.c
View File

@ -166,7 +166,7 @@ intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_mode_fb_cmd2 mode_cmd = { 0 };
struct drm_mode_fb_cmd2 mode_cmd = {};
struct drm_framebuffer *fb = &plane_config->fb->base;
struct i915_vma *vma;

2
drivers/gpu/drm/i915/display/intel_sdvo.c
View File

@ -649,7 +649,7 @@ intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len
static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
{
struct intel_sdvo_set_target_input_args targets = {0};
struct intel_sdvo_set_target_input_args targets = {};
return intel_sdvo_set_value(intel_sdvo,
SDVO_CMD_SET_TARGET_INPUT,
&targets, sizeof(targets));

2
drivers/gpu/drm/i915/display/intel_snps_phy.c
View File

@ -1998,7 +1998,7 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_mpllb_state mpllb_hw_state = { 0 };
struct intel_mpllb_state mpllb_hw_state = {};
const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
struct intel_encoder *encoder;

2
drivers/gpu/drm/i915/display/intel_wm.c
View File

@ -290,7 +290,7 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
{
struct seq_file *m = file->private_data;
struct drm_i915_private *dev_priv = m->private;
u16 new[8] = { 0 };
u16 new[8] = {};
int level;
int ret;
char tmp[32];