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drm/omap: cleanup dispc_fclk_rate()

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With the new PLL helpers, we can clean up the dispc_fclk_rate(). This
will also make dispc_fclk_rate() support clock sources it didn't support
earlier.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Tomi Valkeinen 2016-05-18 13:52:14 +03:00
parent 01575776e5
commit ef03b40126
1 changed files with 11 additions and 20 deletions
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31
drivers/gpu/drm/omapdrm/dss/dispc.c
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@ -3299,30 +3299,21 @@ static void dispc_mgr_get_lcd_divisor(enum omap_channel channel, int *lck_div,
static unsigned long dispc_fclk_rate(void) static unsigned long dispc_fclk_rate(void)
{ {
struct dss_pll *pll; unsigned long r;
unsigned long r = 0; enum dss_clk_source src;
switch (dss_get_dispc_clk_source()) { src = dss_get_dispc_clk_source();
case DSS_CLK_SRC_FCK:
if (src == DSS_CLK_SRC_FCK) {
r = dss_get_dispc_clk_rate(); r = dss_get_dispc_clk_rate();
break; } else {
case DSS_CLK_SRC_PLL1_1: struct dss_pll *pll;
pll = dss_pll_find("dsi0"); unsigned clkout_idx;
if (!pll)
pll = dss_pll_find("video0");
r = pll->cinfo.clkout[0]; pll = dss_pll_find_by_src(src);
break; clkout_idx = dss_pll_get_clkout_idx_for_src(src);
case DSS_CLK_SRC_PLL2_1:
pll = dss_pll_find("dsi1");
if (!pll)
pll = dss_pll_find("video1");
r = pll->cinfo.clkout[0]; r = pll->cinfo.clkout[clkout_idx];
break;
default:
BUG();
return 0;
} }
return r; return r;