tile,mn10300: add device parameter to dma_cache_sync()
Since v2.6.20 "Pass struct dev pointer to dma_cache_sync()" (d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a struct dev pointer, but these appear to be missing from the tile and mn10300 implementations, so add them. Signed-off-by: James Hogan <james.hogan@imgtec.com> [cmetcalf@tilera.com: took only the "tile" portion as I don't maintain mn10300] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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@ -65,7 +65,8 @@ extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t,
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extern void dma_sync_single_range_for_device(struct device *, dma_addr_t,
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extern void dma_sync_single_range_for_device(struct device *, dma_addr_t,
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unsigned long offset, size_t,
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unsigned long offset, size_t,
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enum dma_data_direction);
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enum dma_data_direction);
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extern void dma_cache_sync(void *vaddr, size_t, enum dma_data_direction);
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extern void dma_cache_sync(struct device *dev, void *vaddr, size_t,
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enum dma_data_direction);
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static inline int
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static inline int
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dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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@ -244,7 +244,7 @@ EXPORT_SYMBOL(dma_sync_single_range_for_device);
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* dma_alloc_noncoherent() returns non-cacheable memory, so there's no
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* dma_alloc_noncoherent() returns non-cacheable memory, so there's no
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* need to do any flushing here.
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* need to do any flushing here.
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*/
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*/
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void dma_cache_sync(void *vaddr, size_t size,
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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enum dma_data_direction direction)
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{
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{
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}
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}
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