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e1000e: use correct type for read of 32-bit register

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The POEMB register is 32 bits, not 16.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Bruce Allan 2012-08-17 06:17:51 +00:00 committed by Jeff Kirsher
parent 761743ebc9
commit efc38d2af5
1 changed files with 2 additions and 2 deletions
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4
drivers/net/ethernet/intel/e1000e/82571.c
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@ -653,7 +653,7 @@ static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw)
**/ **/
static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active) static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active)
{ {
u16 data = er32(POEMB); u32 data = er32(POEMB);
if (active) if (active)
data |= E1000_PHY_CTRL_D0A_LPLU; data |= E1000_PHY_CTRL_D0A_LPLU;
@ -677,7 +677,7 @@ static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active)
**/ **/
static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active) static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active)
{ {
u16 data = er32(POEMB); u32 data = er32(POEMB);
if (!active) { if (!active) {
data &= ~E1000_PHY_CTRL_NOND0A_LPLU; data &= ~E1000_PHY_CTRL_NOND0A_LPLU;