arm64: dts: st: add all 8 spi nodes on stm32mp251
Add the 8 nodes for all spi instances available on the stm32mp251. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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f08b42c119
@ -115,6 +115,30 @@
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#access-controller-cells = <1>;
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ranges;
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spi2: spi@400b0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x400b0000 0x400>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI2>;
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resets = <&rcc SPI2_R>;
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access-controllers = <&rifsc 23>;
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status = "disabled";
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};
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spi3: spi@400c0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x400c0000 0x400>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI3>;
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resets = <&rcc SPI3_R>;
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access-controllers = <&rifsc 24>;
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status = "disabled";
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};
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usart2: serial@400e0000 {
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compatible = "st,stm32h7-uart";
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reg = <0x400e0000 0x400>;
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@ -215,6 +239,78 @@
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status = "disabled";
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};
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spi1: spi@40230000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x40230000 0x400>;
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI1>;
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resets = <&rcc SPI1_R>;
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access-controllers = <&rifsc 22>;
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status = "disabled";
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};
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spi4: spi@40240000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x40240000 0x400>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI4>;
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resets = <&rcc SPI4_R>;
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access-controllers = <&rifsc 25>;
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status = "disabled";
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};
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spi5: spi@40280000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x40280000 0x400>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI5>;
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resets = <&rcc SPI5_R>;
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access-controllers = <&rifsc 26>;
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status = "disabled";
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};
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spi6: spi@40350000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x40350000 0x400>;
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interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI6>;
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resets = <&rcc SPI6_R>;
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access-controllers = <&rifsc 27>;
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status = "disabled";
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};
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spi7: spi@40360000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x40360000 0x400>;
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interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI7>;
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resets = <&rcc SPI7_R>;
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access-controllers = <&rifsc 28>;
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status = "disabled";
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};
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spi8: spi@46020000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32mp25-spi";
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reg = <0x46020000 0x400>;
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interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc CK_KER_SPI8>;
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resets = <&rcc SPI8_R>;
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access-controllers = <&rifsc 29>;
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status = "disabled";
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};
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i2c8: i2c@46040000 {
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compatible = "st,stm32mp25-i2c";
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reg = <0x46040000 0x400>;
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