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@ -31,6 +31,7 @@
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/platform_data/dma-s3c24xx.h>
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#include <mach/hardware.h>
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#include <mach/regs-clock.h>
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@ -44,6 +45,7 @@
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#include <mach/regs-gpio.h>
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#include <plat/regs-serial.h>
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#include <mach/dma.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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@ -329,3 +331,107 @@ void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
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clk_p.rate = pclk;
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clk_f.rate = fclk;
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}
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#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
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defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
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static struct resource s3c2410_dma_resource[] = {
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[0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA),
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[1] = DEFINE_RES_IRQ(IRQ_DMA0),
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[2] = DEFINE_RES_IRQ(IRQ_DMA1),
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[3] = DEFINE_RES_IRQ(IRQ_DMA2),
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[4] = DEFINE_RES_IRQ(IRQ_DMA3),
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};
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#endif
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#ifdef CONFIG_CPU_S3C2412
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static struct s3c24xx_dma_channel s3c2412_dma_channels[DMACH_MAX] = {
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[DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 },
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[DMACH_XD1] = { S3C24XX_DMA_AHB, true, 18 },
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[DMACH_SDI] = { S3C24XX_DMA_APB, false, 10 },
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[DMACH_SPI0_RX] = { S3C24XX_DMA_APB, true, 1 },
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[DMACH_SPI0_TX] = { S3C24XX_DMA_APB, true, 0 },
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[DMACH_SPI1_RX] = { S3C24XX_DMA_APB, true, 3 },
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[DMACH_SPI1_TX] = { S3C24XX_DMA_APB, true, 2 },
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[DMACH_UART0] = { S3C24XX_DMA_APB, true, 19 },
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[DMACH_UART1] = { S3C24XX_DMA_APB, true, 21 },
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[DMACH_UART2] = { S3C24XX_DMA_APB, true, 23 },
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[DMACH_UART0_SRC2] = { S3C24XX_DMA_APB, true, 20 },
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[DMACH_UART1_SRC2] = { S3C24XX_DMA_APB, true, 22 },
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[DMACH_UART2_SRC2] = { S3C24XX_DMA_APB, true, 24 },
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[DMACH_TIMER] = { S3C24XX_DMA_APB, true, 9 },
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[DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, 5 },
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[DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, 4 },
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[DMACH_USB_EP1] = { S3C24XX_DMA_APB, true, 13 },
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[DMACH_USB_EP2] = { S3C24XX_DMA_APB, true, 14 },
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[DMACH_USB_EP3] = { S3C24XX_DMA_APB, true, 15 },
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[DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, 16 },
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};
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static struct s3c24xx_dma_platdata s3c2412_dma_platdata = {
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.num_phy_channels = 4,
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.channels = s3c2412_dma_channels,
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.num_channels = DMACH_MAX,
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};
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struct platform_device s3c2412_device_dma = {
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.name = "s3c2412-dma",
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.id = 0,
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.num_resources = ARRAY_SIZE(s3c2410_dma_resource),
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.resource = s3c2410_dma_resource,
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.dev = {
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.platform_data = &s3c2412_dma_platdata,
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},
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};
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#endif
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#if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416)
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static struct resource s3c2443_dma_resource[] = {
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[0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA),
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[1] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA0),
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[2] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA1),
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[3] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA2),
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[4] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA3),
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[5] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA4),
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[6] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA5),
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};
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static struct s3c24xx_dma_channel s3c2443_dma_channels[DMACH_MAX] = {
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[DMACH_XD0] = { S3C24XX_DMA_AHB, true, 17 },
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[DMACH_XD1] = { S3C24XX_DMA_AHB, true, 18 },
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[DMACH_SDI] = { S3C24XX_DMA_APB, false, 10 },
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[DMACH_SPI0_RX] = { S3C24XX_DMA_APB, true, 1 },
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[DMACH_SPI0_TX] = { S3C24XX_DMA_APB, true, 0 },
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[DMACH_SPI1_RX] = { S3C24XX_DMA_APB, true, 3 },
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[DMACH_SPI1_TX] = { S3C24XX_DMA_APB, true, 2 },
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[DMACH_UART0] = { S3C24XX_DMA_APB, true, 19 },
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[DMACH_UART1] = { S3C24XX_DMA_APB, true, 21 },
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[DMACH_UART2] = { S3C24XX_DMA_APB, true, 23 },
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[DMACH_UART3] = { S3C24XX_DMA_APB, true, 25 },
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[DMACH_UART0_SRC2] = { S3C24XX_DMA_APB, true, 20 },
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[DMACH_UART1_SRC2] = { S3C24XX_DMA_APB, true, 22 },
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[DMACH_UART2_SRC2] = { S3C24XX_DMA_APB, true, 24 },
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[DMACH_UART3_SRC2] = { S3C24XX_DMA_APB, true, 26 },
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[DMACH_TIMER] = { S3C24XX_DMA_APB, true, 9 },
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[DMACH_I2S_IN] = { S3C24XX_DMA_APB, true, 5 },
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[DMACH_I2S_OUT] = { S3C24XX_DMA_APB, true, 4 },
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[DMACH_PCM_IN] = { S3C24XX_DMA_APB, true, 28 },
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[DMACH_PCM_OUT] = { S3C24XX_DMA_APB, true, 27 },
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[DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, 29 },
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};
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static struct s3c24xx_dma_platdata s3c2443_dma_platdata = {
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.num_phy_channels = 6,
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.channels = s3c2443_dma_channels,
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.num_channels = DMACH_MAX,
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};
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struct platform_device s3c2443_device_dma = {
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.name = "s3c2443-dma",
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.id = 0,
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.num_resources = ARRAY_SIZE(s3c2443_dma_resource),
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.resource = s3c2443_dma_resource,
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.dev = {
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.platform_data = &s3c2443_dma_platdata,
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},
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};
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#endif
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