KVM: x86: smm: use smram struct for 32 bit smram load/restore
Use kvm_smram_state_32 struct to save/restore 32 bit SMM state (used when X86_FEATURE_LM is not present in the guest CPUID). Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Message-Id: <20221025124741.228045-19-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -149,22 +149,17 @@ static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
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return flags;
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}
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static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
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static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu,
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struct kvm_smm_seg_state_32 *state,
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u32 *selector, int n)
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{
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struct kvm_segment seg;
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int offset;
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kvm_get_segment(vcpu, &seg, n);
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PUT_SMSTATE(u32, buf, 0x7fa8 + n * 4, seg.selector);
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if (n < 3)
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offset = 0x7f84 + n * 12;
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else
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offset = 0x7f2c + (n - 3) * 12;
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PUT_SMSTATE(u32, buf, offset + 8, seg.base);
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PUT_SMSTATE(u32, buf, offset + 4, seg.limit);
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PUT_SMSTATE(u32, buf, offset, enter_smm_get_segment_flags(&seg));
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*selector = seg.selector;
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state->base = seg.base;
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state->limit = seg.limit;
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state->flags = enter_smm_get_segment_flags(&seg);
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}
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#ifdef CONFIG_X86_64
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@ -185,54 +180,48 @@ static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
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}
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#endif
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static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
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static void enter_smm_save_state_32(struct kvm_vcpu *vcpu,
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struct kvm_smram_state_32 *smram)
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{
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struct desc_ptr dt;
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struct kvm_segment seg;
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unsigned long val;
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int i;
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PUT_SMSTATE(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
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PUT_SMSTATE(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
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PUT_SMSTATE(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
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PUT_SMSTATE(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
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smram->cr0 = kvm_read_cr0(vcpu);
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smram->cr3 = kvm_read_cr3(vcpu);
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smram->eflags = kvm_get_rflags(vcpu);
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smram->eip = kvm_rip_read(vcpu);
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for (i = 0; i < 8; i++)
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PUT_SMSTATE(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
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smram->gprs[i] = kvm_register_read_raw(vcpu, i);
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kvm_get_dr(vcpu, 6, &val);
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PUT_SMSTATE(u32, buf, 0x7fcc, (u32)val);
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smram->dr6 = (u32)val;
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kvm_get_dr(vcpu, 7, &val);
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PUT_SMSTATE(u32, buf, 0x7fc8, (u32)val);
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smram->dr7 = (u32)val;
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kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
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PUT_SMSTATE(u32, buf, 0x7fc4, seg.selector);
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PUT_SMSTATE(u32, buf, 0x7f64, seg.base);
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PUT_SMSTATE(u32, buf, 0x7f60, seg.limit);
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PUT_SMSTATE(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
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kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
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PUT_SMSTATE(u32, buf, 0x7fc0, seg.selector);
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PUT_SMSTATE(u32, buf, 0x7f80, seg.base);
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PUT_SMSTATE(u32, buf, 0x7f7c, seg.limit);
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PUT_SMSTATE(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
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enter_smm_save_seg_32(vcpu, &smram->tr, &smram->tr_sel, VCPU_SREG_TR);
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enter_smm_save_seg_32(vcpu, &smram->ldtr, &smram->ldtr_sel, VCPU_SREG_LDTR);
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static_call(kvm_x86_get_gdt)(vcpu, &dt);
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PUT_SMSTATE(u32, buf, 0x7f74, dt.address);
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PUT_SMSTATE(u32, buf, 0x7f70, dt.size);
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smram->gdtr.base = dt.address;
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smram->gdtr.limit = dt.size;
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static_call(kvm_x86_get_idt)(vcpu, &dt);
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PUT_SMSTATE(u32, buf, 0x7f58, dt.address);
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PUT_SMSTATE(u32, buf, 0x7f54, dt.size);
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smram->idtr.base = dt.address;
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smram->idtr.limit = dt.size;
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for (i = 0; i < 6; i++)
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enter_smm_save_seg_32(vcpu, buf, i);
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enter_smm_save_seg_32(vcpu, &smram->es, &smram->es_sel, VCPU_SREG_ES);
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enter_smm_save_seg_32(vcpu, &smram->cs, &smram->cs_sel, VCPU_SREG_CS);
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enter_smm_save_seg_32(vcpu, &smram->ss, &smram->ss_sel, VCPU_SREG_SS);
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PUT_SMSTATE(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
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enter_smm_save_seg_32(vcpu, &smram->ds, &smram->ds_sel, VCPU_SREG_DS);
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enter_smm_save_seg_32(vcpu, &smram->fs, &smram->fs_sel, VCPU_SREG_FS);
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enter_smm_save_seg_32(vcpu, &smram->gs, &smram->gs_sel, VCPU_SREG_GS);
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/* revision id */
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PUT_SMSTATE(u32, buf, 0x7efc, 0x00020000);
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PUT_SMSTATE(u32, buf, 0x7ef8, vcpu->arch.smbase);
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smram->cr4 = kvm_read_cr4(vcpu);
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smram->smm_revision = 0x00020000;
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smram->smbase = vcpu->arch.smbase;
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}
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#ifdef CONFIG_X86_64
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@ -306,7 +295,7 @@ void enter_smm(struct kvm_vcpu *vcpu)
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enter_smm_save_state_64(vcpu, smram.bytes);
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else
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#endif
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enter_smm_save_state_32(vcpu, smram.bytes);
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enter_smm_save_state_32(vcpu, &smram.smram32);
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/*
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* Give enter_smm() a chance to make ISA-specific changes to the vCPU
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@ -398,21 +387,16 @@ static void rsm_set_desc_flags(struct kvm_segment *desc, u32 flags)
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desc->padding = 0;
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}
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static int rsm_load_seg_32(struct kvm_vcpu *vcpu, const char *smstate,
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int n)
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static int rsm_load_seg_32(struct kvm_vcpu *vcpu,
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const struct kvm_smm_seg_state_32 *state,
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u16 selector, int n)
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{
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struct kvm_segment desc;
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int offset;
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if (n < 3)
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offset = 0x7f84 + n * 12;
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else
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offset = 0x7f2c + (n - 3) * 12;
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desc.selector = GET_SMSTATE(u32, smstate, 0x7fa8 + n * 4);
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desc.base = GET_SMSTATE(u32, smstate, offset + 8);
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desc.limit = GET_SMSTATE(u32, smstate, offset + 4);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, offset));
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desc.selector = selector;
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desc.base = state->base;
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desc.limit = state->limit;
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rsm_set_desc_flags(&desc, state->flags);
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kvm_set_segment(vcpu, &desc, n);
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return X86EMUL_CONTINUE;
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}
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@ -481,63 +465,46 @@ static int rsm_enter_protected_mode(struct kvm_vcpu *vcpu,
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}
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static int rsm_load_state_32(struct x86_emulate_ctxt *ctxt,
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u8 *smstate)
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const struct kvm_smram_state_32 *smstate)
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{
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struct kvm_vcpu *vcpu = ctxt->vcpu;
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struct kvm_segment desc;
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struct desc_ptr dt;
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u32 val, cr0, cr3, cr4;
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int i;
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cr0 = GET_SMSTATE(u32, smstate, 0x7ffc);
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cr3 = GET_SMSTATE(u32, smstate, 0x7ff8);
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ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7ff4) | X86_EFLAGS_FIXED;
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ctxt->_eip = GET_SMSTATE(u32, smstate, 0x7ff0);
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ctxt->eflags = smstate->eflags | X86_EFLAGS_FIXED;
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ctxt->_eip = smstate->eip;
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for (i = 0; i < 8; i++)
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*reg_write(ctxt, i) = GET_SMSTATE(u32, smstate, 0x7fd0 + i * 4);
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*reg_write(ctxt, i) = smstate->gprs[i];
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val = GET_SMSTATE(u32, smstate, 0x7fcc);
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if (kvm_set_dr(vcpu, 6, val))
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if (kvm_set_dr(vcpu, 6, smstate->dr6))
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return X86EMUL_UNHANDLEABLE;
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if (kvm_set_dr(vcpu, 7, smstate->dr7))
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return X86EMUL_UNHANDLEABLE;
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val = GET_SMSTATE(u32, smstate, 0x7fc8);
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rsm_load_seg_32(vcpu, &smstate->tr, smstate->tr_sel, VCPU_SREG_TR);
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rsm_load_seg_32(vcpu, &smstate->ldtr, smstate->ldtr_sel, VCPU_SREG_LDTR);
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if (kvm_set_dr(vcpu, 7, val))
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return X86EMUL_UNHANDLEABLE;
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desc.selector = GET_SMSTATE(u32, smstate, 0x7fc4);
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desc.base = GET_SMSTATE(u32, smstate, 0x7f64);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7f60);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7f5c));
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kvm_set_segment(vcpu, &desc, VCPU_SREG_TR);
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desc.selector = GET_SMSTATE(u32, smstate, 0x7fc0);
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desc.base = GET_SMSTATE(u32, smstate, 0x7f80);
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desc.limit = GET_SMSTATE(u32, smstate, 0x7f7c);
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rsm_set_desc_flags(&desc, GET_SMSTATE(u32, smstate, 0x7f78));
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kvm_set_segment(vcpu, &desc, VCPU_SREG_LDTR);
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dt.address = GET_SMSTATE(u32, smstate, 0x7f74);
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dt.size = GET_SMSTATE(u32, smstate, 0x7f70);
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dt.address = smstate->gdtr.base;
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dt.size = smstate->gdtr.limit;
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static_call(kvm_x86_set_gdt)(vcpu, &dt);
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dt.address = GET_SMSTATE(u32, smstate, 0x7f58);
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dt.size = GET_SMSTATE(u32, smstate, 0x7f54);
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dt.address = smstate->idtr.base;
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dt.size = smstate->idtr.limit;
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static_call(kvm_x86_set_idt)(vcpu, &dt);
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for (i = 0; i < 6; i++) {
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int r = rsm_load_seg_32(vcpu, smstate, i);
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if (r != X86EMUL_CONTINUE)
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return r;
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}
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rsm_load_seg_32(vcpu, &smstate->es, smstate->es_sel, VCPU_SREG_ES);
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rsm_load_seg_32(vcpu, &smstate->cs, smstate->cs_sel, VCPU_SREG_CS);
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rsm_load_seg_32(vcpu, &smstate->ss, smstate->ss_sel, VCPU_SREG_SS);
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cr4 = GET_SMSTATE(u32, smstate, 0x7f14);
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rsm_load_seg_32(vcpu, &smstate->ds, smstate->ds_sel, VCPU_SREG_DS);
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rsm_load_seg_32(vcpu, &smstate->fs, smstate->fs_sel, VCPU_SREG_FS);
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rsm_load_seg_32(vcpu, &smstate->gs, smstate->gs_sel, VCPU_SREG_GS);
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vcpu->arch.smbase = GET_SMSTATE(u32, smstate, 0x7ef8);
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vcpu->arch.smbase = smstate->smbase;
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return rsm_enter_protected_mode(vcpu, cr0, cr3, cr4);
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return rsm_enter_protected_mode(vcpu, smstate->cr0,
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smstate->cr3, smstate->cr4);
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}
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#ifdef CONFIG_X86_64
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@ -684,5 +651,5 @@ int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
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return rsm_load_state_64(ctxt, smram.bytes);
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else
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#endif
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return rsm_load_state_32(ctxt, smram.bytes);
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return rsm_load_state_32(ctxt, &smram.smram32);
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}
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