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drm/amd/display: Add force detile buffer size debug flag

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[WHY]
Allow changing DET size with debug flag for testing purposes

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Michael Strauss 2021-11-18 16:57:25 -05:00 committed by Alex Deucher
parent 2f2a4b1879
commit f3edefce70
2 changed files with 15 additions and 0 deletions
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12
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -75,6 +75,16 @@ enum dc_plane_type {
DC_PLANE_TYPE_DCN_UNIVERSAL,
};
// Sizes defined as multiples of 64KB
enum det_size {
DET_SIZE_DEFAULT = 0,
DET_SIZE_192KB = 3,
DET_SIZE_256KB = 4,
DET_SIZE_320KB = 5,
DET_SIZE_384KB = 6
};
struct dc_plane_cap {
enum dc_plane_type type;
uint32_t blends_with_above : 1;
@ -692,6 +702,8 @@ struct dc_debug_options {
/* FEC/PSR1 sequence enable delay in 100us */
uint8_t fec_enable_delay_in100us;
bool enable_driver_sequence_debug;
enum det_size crb_alloc_policy;
int crb_alloc_policy_min_disp_count;
#if defined(CONFIG_DRM_AMD_DC_DCN)
bool disable_z10;
bool enable_sw_cntl_psr;

3
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
View File

@ -1830,6 +1830,9 @@ static int dcn31_populate_dml_pipes_from_context(
context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192;
pipes[0].pipe.src.unbounded_req_mode = true;
}
} else if (context->stream_count >= dc->debug.crb_alloc_policy_min_disp_count
&& dc->debug.crb_alloc_policy > DET_SIZE_DEFAULT) {
context->bw_ctx.dml.ip.det_buffer_size_kbytes = dc->debug.crb_alloc_policy * 64;
}
return pipe_cnt;