net: ocelot: fix wrong time_after usage
Accidentally noticed, that this driver is the only user of while (time_after(jiffies...)). It looks like typo, because likely this while loop will finish after 1st iteration, because time_after() returns true when 1st argument _is after_ 2nd one. There is one possible problem with this poll loop: the scheduler could put the thread to sleep, and it does not get woken up for OCELOT_FDMA_CH_SAFE_TIMEOUT_US. During that time, the hardware has done its thing, but you exit the while loop and return -ETIMEDOUT. Fix it by using sane poll API that avoids all problems described above Fixes: 753a026cfec1 ("net: ocelot: add FDMA support") Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Pavel Skripkin <paskripkin@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220706132845.27968-1-paskripkin@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -94,19 +94,18 @@ static void ocelot_fdma_activate_chan(struct ocelot *ocelot, dma_addr_t dma,
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ocelot_fdma_writel(ocelot, MSCC_FDMA_CH_ACTIVATE, BIT(chan));
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}
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static u32 ocelot_fdma_read_ch_safe(struct ocelot *ocelot)
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{
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return ocelot_fdma_readl(ocelot, MSCC_FDMA_CH_SAFE);
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}
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static int ocelot_fdma_wait_chan_safe(struct ocelot *ocelot, int chan)
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{
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unsigned long timeout;
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u32 safe;
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timeout = jiffies + usecs_to_jiffies(OCELOT_FDMA_CH_SAFE_TIMEOUT_US);
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do {
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safe = ocelot_fdma_readl(ocelot, MSCC_FDMA_CH_SAFE);
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if (safe & BIT(chan))
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return 0;
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} while (time_after(jiffies, timeout));
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return -ETIMEDOUT;
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return readx_poll_timeout_atomic(ocelot_fdma_read_ch_safe, ocelot, safe,
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safe & BIT(chan), 0,
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OCELOT_FDMA_CH_SAFE_TIMEOUT_US);
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}
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static void ocelot_fdma_dcb_set_data(struct ocelot_fdma_dcb *dcb,
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