net/mlx5e: Remove ESN callbacks if it is not supported
There is no need in implementation of .xdo_dev_state_advance_esn() and setting work as it will never be called in packet offload mode. Link: https://lore.kernel.org/r/2fc9fade32e31f03b100d6086a82ad36269349dc.1680162300.git.leonro@nvidia.com Reviewed-by: Raed Salem <raeds@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
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@ -56,11 +56,6 @@ static bool mlx5e_ipsec_update_esn_state(struct mlx5e_ipsec_sa_entry *sa_entry)
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u32 seq_bottom = 0;
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u8 overlap;
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if (!(sa_entry->x->props.flags & XFRM_STATE_ESN)) {
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sa_entry->esn_state.trigger = 0;
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return false;
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}
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replay_esn = sa_entry->x->replay_esn;
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if (replay_esn->seq >= replay_esn->replay_window)
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seq_bottom = replay_esn->seq - replay_esn->replay_window + 1;
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@ -70,7 +65,6 @@ static bool mlx5e_ipsec_update_esn_state(struct mlx5e_ipsec_sa_entry *sa_entry)
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sa_entry->esn_state.esn = xfrm_replay_seqhi(sa_entry->x,
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htonl(seq_bottom));
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sa_entry->esn_state.trigger = 1;
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if (unlikely(overlap && seq_bottom < MLX5E_IPSEC_ESN_SCOPE_MID)) {
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sa_entry->esn_state.overlap = 0;
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return true;
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@ -229,7 +223,7 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,
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aes_gcm->icv_len = x->aead->alg_icv_len;
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/* esn */
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if (sa_entry->esn_state.trigger) {
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if (x->props.flags & XFRM_STATE_ESN) {
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attrs->esn_trigger = true;
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attrs->esn = sa_entry->esn_state.esn;
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attrs->esn_overlap = sa_entry->esn_state.overlap;
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@ -394,6 +388,22 @@ static void _update_xfrm_state(struct work_struct *work)
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mlx5_accel_esp_modify_xfrm(sa_entry, &modify_work->attrs);
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}
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static void mlx5e_ipsec_set_esn_ops(struct mlx5e_ipsec_sa_entry *sa_entry)
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{
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struct xfrm_state *x = sa_entry->x;
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if (x->xso.type != XFRM_DEV_OFFLOAD_CRYPTO ||
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x->xso.dir != XFRM_DEV_OFFLOAD_OUT)
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return;
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if (x->props.flags & XFRM_STATE_ESN) {
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sa_entry->set_iv_op = mlx5e_ipsec_set_iv_esn;
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return;
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}
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sa_entry->set_iv_op = mlx5e_ipsec_set_iv;
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}
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static int mlx5e_xfrm_add_state(struct xfrm_state *x,
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struct netlink_ext_ack *extack)
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{
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@ -425,7 +435,8 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x,
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goto err_xfrm;
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/* check esn */
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mlx5e_ipsec_update_esn_state(sa_entry);
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if (x->props.flags & XFRM_STATE_ESN)
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mlx5e_ipsec_update_esn_state(sa_entry);
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mlx5e_ipsec_build_accel_xfrm_attrs(sa_entry, &sa_entry->attrs);
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/* create hw context */
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@ -446,11 +457,17 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x,
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if (err)
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goto err_add_rule;
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if (x->xso.dir == XFRM_DEV_OFFLOAD_OUT)
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sa_entry->set_iv_op = (x->props.flags & XFRM_STATE_ESN) ?
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mlx5e_ipsec_set_iv_esn : mlx5e_ipsec_set_iv;
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mlx5e_ipsec_set_esn_ops(sa_entry);
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INIT_WORK(&sa_entry->modify_work.work, _update_xfrm_state);
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switch (x->xso.type) {
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case XFRM_DEV_OFFLOAD_CRYPTO:
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if (x->props.flags & XFRM_STATE_ESN)
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INIT_WORK(&sa_entry->modify_work.work,
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_update_xfrm_state);
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break;
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default:
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break;
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}
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out:
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x->xso.offload_handle = (unsigned long)sa_entry;
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return 0;
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@ -485,7 +502,15 @@ static void mlx5e_xfrm_free_state(struct xfrm_state *x)
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if (x->xso.flags & XFRM_DEV_OFFLOAD_FLAG_ACQ)
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goto sa_entry_free;
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cancel_work_sync(&sa_entry->modify_work.work);
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switch (x->xso.type) {
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case XFRM_DEV_OFFLOAD_CRYPTO:
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if (x->props.flags & XFRM_STATE_ESN)
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cancel_work_sync(&sa_entry->modify_work.work);
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break;
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default:
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break;
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}
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mlx5e_accel_ipsec_fs_del_rule(sa_entry);
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mlx5_ipsec_free_sa_ctx(sa_entry);
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sa_entry_free:
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@ -160,7 +160,6 @@ struct mlx5e_ipsec {
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struct mlx5e_ipsec_esn_state {
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u32 esn;
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u8 trigger: 1;
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u8 overlap: 1;
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};
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@ -225,9 +225,6 @@ static int mlx5_modify_ipsec_obj(struct mlx5e_ipsec_sa_entry *sa_entry,
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void *obj;
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int err;
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if (!attrs->esn_trigger)
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return 0;
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general_obj_types = MLX5_CAP_GEN_64(mdev, general_obj_types);
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if (!(general_obj_types & MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_IPSEC))
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return -EINVAL;
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