Revert "PCI: brcmstb: Split brcm_pcie_setup() into two funcs"
This reverts commit830aa6f29f
. This is part of a revert of the following commits:11ed8b8624
("PCI: brcmstb: Do not turn off WOL regulators on suspend")93e41f3fca
("PCI: brcmstb: Add control of subdevice voltage regulators")67211aadcb
("PCI: brcmstb: Add mechanism to turn on subdev regulators")830aa6f29f
("PCI: brcmstb: Split brcm_pcie_setup() into two funcs") Cyril reported that830aa6f29f
("PCI: brcmstb: Split brcm_pcie_setup() into two funcs"), which appeared in v5.17-rc1, broke booting on the Raspberry Pi Compute Module 4. Apparently830aa6f29f
panics with an Asynchronous SError Interrupt, and after further commits here is a black screen on HDMI and no output on the serial console. This does not seem to affect the Raspberry Pi 4 B. Link: https://bugzilla.kernel.org/show_bug.cgi?id=215925 Link: https://lore.kernel.org/r/20220511201856.808690-5-helgaas@kernel.org Reported-by: Cyril Brulebois <kibi@debian.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -926,9 +926,16 @@ static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie,
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static int brcm_pcie_setup(struct brcm_pcie *pcie)
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{
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struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
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u64 rc_bar2_offset, rc_bar2_size;
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void __iomem *base = pcie->base;
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int ret, memc;
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struct device *dev = pcie->dev;
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struct resource_entry *entry;
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bool ssc_good = false;
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struct resource *res;
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int num_out_wins = 0;
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u16 nlw, cls, lnksta;
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int i, ret, memc;
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u32 tmp, burst, aspm_support;
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/* Reset the bridge */
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@ -1018,40 +1025,6 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
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if (pcie->gen)
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brcm_pcie_set_gen(pcie, pcie->gen);
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/* Don't advertise L0s capability if 'aspm-no-l0s' */
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aspm_support = PCIE_LINK_STATE_L1;
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if (!of_property_read_bool(pcie->np, "aspm-no-l0s"))
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aspm_support |= PCIE_LINK_STATE_L0S;
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tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
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u32p_replace_bits(&tmp, aspm_support,
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PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK);
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writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
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/*
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* For config space accesses on the RC, show the right class for
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* a PCIe-PCIe bridge (the default setting is to be EP mode).
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*/
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tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3);
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u32p_replace_bits(&tmp, 0x060400,
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PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK);
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writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3);
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return 0;
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}
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static int brcm_pcie_linkup(struct brcm_pcie *pcie)
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{
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struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
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struct device *dev = pcie->dev;
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void __iomem *base = pcie->base;
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struct resource_entry *entry;
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struct resource *res;
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int num_out_wins = 0;
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u16 nlw, cls, lnksta;
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bool ssc_good = false;
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u32 tmp;
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int ret, i;
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/* Unassert the fundamental reset */
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pcie->perst_set(pcie, 0);
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@ -1102,6 +1075,24 @@ static int brcm_pcie_linkup(struct brcm_pcie *pcie)
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num_out_wins++;
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}
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/* Don't advertise L0s capability if 'aspm-no-l0s' */
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aspm_support = PCIE_LINK_STATE_L1;
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if (!of_property_read_bool(pcie->np, "aspm-no-l0s"))
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aspm_support |= PCIE_LINK_STATE_L0S;
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tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
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u32p_replace_bits(&tmp, aspm_support,
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PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK);
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writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
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/*
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* For config space accesses on the RC, show the right class for
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* a PCIe-PCIe bridge (the default setting is to be EP mode).
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*/
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tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3);
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u32p_replace_bits(&tmp, 0x060400,
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PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK);
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writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3);
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if (pcie->ssc) {
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ret = brcm_pcie_set_ssc(pcie);
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if (ret == 0)
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@ -1290,10 +1281,6 @@ static int brcm_pcie_resume(struct device *dev)
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if (ret)
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goto err_reset;
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ret = brcm_pcie_linkup(pcie);
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if (ret)
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goto err_reset;
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if (pcie->msi)
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brcm_msi_set_regs(pcie->msi);
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