drm/amd/display: fix odm 2:1 policy not being applied consistently in 4k144 modes
[Why] odm 2:1 policy is splitting the pipes in 4k144. then in subvp code, we merge the pipes. but since the configuration is unsupported, we keep the pipes split [How] for unsupported subvp configuration, redo the dml and pipe split calls Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1082,6 +1082,11 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,
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dc->res_pool->funcs->remove_phantom_pipes(dc, context);
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vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported;
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*pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, false);
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*vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, *pipe_cnt);
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/* This may adjust vlevel and maxMpcComb */
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if (*vlevel < context->bw_ctx.dml.soc.num_states)
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*vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, *vlevel, split, merge);
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} else {
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// only call dcn20_validate_apply_pipe_split_flags if we found a supported config
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memset(split, 0, MAX_PIPES * sizeof(int));
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