ASoC: cs42l42: Add support for 2304000 Bit clock

Add support for 24bits, 2 channels, 48k Sample rate bit clock

Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Message-Id: <20210525090822.64577-2-tanureal@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@sirena.org.uk>
This commit is contained in:
Lucas Tanure 2021-05-25 10:08:20 +01:00 committed by Mark Brown
parent 1c52825c38
commit f5b49d9851
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0

View File

@ -598,6 +598,7 @@ struct cs42l42_pll_params {
*/
static const struct cs42l42_pll_params pll_ratio_table[] = {
{ 1536000, 0, 1, 0x00, 0x7D, 0x000000, 0x03, 0x10, 12000000, 125, 2},
{ 2304000, 0, 1, 0x00, 0x55, 0xC00000, 0x02, 0x10, 12288000, 85, 2},
{ 2822400, 0, 1, 0x00, 0x40, 0x000000, 0x03, 0x10, 11289600, 128, 1},
{ 3000000, 0, 1, 0x00, 0x40, 0x000000, 0x03, 0x10, 12000000, 128, 1},
{ 3072000, 0, 1, 0x00, 0x3E, 0x800000, 0x03, 0x10, 12000000, 125, 1},