[media] m88ds3103: use Hz instead of kHz on calculations
There was some calculations where was kHz used in order to keep calculation withing 32-bit. Convert all to Hz and use 64-bit division helpers where needed. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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f5d9b88db7
@ -307,7 +307,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */
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u8 buf[3];
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u16 u16tmp;
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u32 tuner_frequency, target_mclk;
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u32 tuner_frequency_khz, target_mclk;
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s32 s32tmp;
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dev_dbg(&client->dev,
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@ -344,7 +344,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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}
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if (fe->ops.tuner_ops.get_frequency) {
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ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency);
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ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency_khz);
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if (ret)
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goto err;
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} else {
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@ -353,20 +353,20 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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* actual frequency used. Carrier offset calculation is not
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* valid.
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*/
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tuner_frequency = c->frequency;
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tuner_frequency_khz = c->frequency;
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}
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/* select M88RS6000 demod main mclk and ts mclk from tuner die. */
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if (dev->chip_id == M88RS6000_CHIP_ID) {
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if (c->symbol_rate > 45010000)
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dev->mclk_khz = 110250;
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dev->mclk = 110250000;
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else
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dev->mclk_khz = 96000;
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dev->mclk = 96000000;
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if (c->delivery_system == SYS_DVBS)
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target_mclk = 96000;
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target_mclk = 96000000;
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else
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target_mclk = 144000;
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target_mclk = 144000000;
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/* Enable demod clock path */
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ret = regmap_write(dev->regmap, 0x06, 0x00);
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@ -375,7 +375,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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usleep_range(10000, 20000);
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} else {
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/* set M88DS3103 mclk and ts mclk. */
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dev->mclk_khz = 96000;
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dev->mclk = 96000000;
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switch (dev->cfg->ts_mode) {
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case M88DS3103_TS_SERIAL:
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@ -385,14 +385,14 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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case M88DS3103_TS_PARALLEL:
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case M88DS3103_TS_CI:
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if (c->delivery_system == SYS_DVBS)
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target_mclk = 96000;
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target_mclk = 96000000;
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else {
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if (c->symbol_rate < 18000000)
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target_mclk = 96000;
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target_mclk = 96000000;
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else if (c->symbol_rate < 28000000)
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target_mclk = 144000;
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target_mclk = 144000000;
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else
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target_mclk = 192000;
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target_mclk = 192000000;
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}
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break;
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default:
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@ -402,15 +402,15 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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}
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switch (target_mclk) {
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case 96000:
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case 96000000:
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u8tmp1 = 0x02; /* 0b10 */
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u8tmp2 = 0x01; /* 0b01 */
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break;
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case 144000:
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case 144000000:
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u8tmp1 = 0x00; /* 0b00 */
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u8tmp2 = 0x01; /* 0b01 */
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break;
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case 192000:
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case 192000000:
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u8tmp1 = 0x03; /* 0b11 */
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u8tmp2 = 0x00; /* 0b00 */
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break;
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@ -464,8 +464,8 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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}
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if (dev->chip_id == M88RS6000_CHIP_ID) {
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if ((c->delivery_system == SYS_DVBS2)
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&& ((c->symbol_rate / 1000) <= 5000)) {
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if (c->delivery_system == SYS_DVBS2 &&
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c->symbol_rate <= 5000000) {
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ret = regmap_write(dev->regmap, 0xc0, 0x04);
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if (ret)
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goto err;
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@ -532,7 +532,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1;
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}
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dev_dbg(&client->dev, "target_mclk=%d ts_clk=%d ts_clk_divide_ratio=%u\n",
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dev_dbg(&client->dev, "target_mclk=%u ts_clk=%u ts_clk_divide_ratio=%u\n",
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target_mclk, dev->cfg->ts_clk, u16tmp);
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/* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
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@ -569,7 +569,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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if (ret)
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goto err;
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u16tmp = DIV_ROUND_CLOSEST((c->symbol_rate / 1000) << 15, dev->mclk_khz / 2);
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u16tmp = DIV_ROUND_CLOSEST_ULL((u64)c->symbol_rate * 0x10000, dev->mclk);
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buf[0] = (u16tmp >> 0) & 0xff;
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buf[1] = (u16tmp >> 8) & 0xff;
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ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);
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@ -589,10 +589,11 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe)
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goto err;
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dev_dbg(&client->dev, "carrier offset=%d\n",
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(tuner_frequency - c->frequency));
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(tuner_frequency_khz - c->frequency));
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s32tmp = 0x10000 * (tuner_frequency - c->frequency);
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s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk_khz);
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/* Use 32-bit calc as there is no s64 version of DIV_ROUND_CLOSEST() */
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s32tmp = 0x10000 * (tuner_frequency_khz - c->frequency);
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s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk / 1000);
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buf[0] = (s32tmp >> 0) & 0xff;
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buf[1] = (s32tmp >> 8) & 0xff;
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ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);
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@ -937,8 +938,7 @@ static int m88ds3103_get_frontend(struct dvb_frontend *fe,
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if (ret)
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goto err;
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c->symbol_rate = 1ull * ((buf[1] << 8) | (buf[0] << 0)) *
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dev->mclk_khz * 1000 / 0x10000;
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c->symbol_rate = DIV_ROUND_CLOSEST_ULL((u64)(buf[1] << 8 | buf[0] << 0) * dev->mclk, 0x10000);
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return 0;
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err:
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@ -1381,7 +1381,7 @@ static int m88ds3103_probe(struct i2c_client *client,
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dev->config.clock = pdata->clk;
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dev->config.i2c_wr_max = pdata->i2c_wr_max;
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dev->config.ts_mode = pdata->ts_mode;
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dev->config.ts_clk = pdata->ts_clk;
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dev->config.ts_clk = pdata->ts_clk * 1000;
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dev->config.ts_clk_pol = pdata->ts_clk_pol;
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dev->config.spec_inv = pdata->spec_inv;
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dev->config.agc_inv = pdata->agc_inv;
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@ -27,7 +27,6 @@
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#define M88DS3103_FIRMWARE "dvb-demod-m88ds3103.fw"
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#define M88RS6000_FIRMWARE "dvb-demod-m88rs6000.fw"
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#define M88DS3103_MCLK_KHZ 96000
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#define M88RS6000_CHIP_ID 0x74
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#define M88DS3103_CHIP_ID 0x70
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@ -46,7 +45,7 @@ struct m88ds3103_dev {
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/* auto detect chip id to do different config */
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u8 chip_id;
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/* main mclk is calculated for M88RS6000 dynamically */
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s32 mclk_khz;
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s32 mclk;
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u64 post_bit_error;
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u64 post_bit_count;
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};
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