x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1
The show/store_cache_disable routines depend unnecessarily on NUMA's cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA. Remove that dependency by using a helper which is always correct. While at it, enable L3 Cache Index disable on rev D1 Istanbuls which sport the feature too. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <20100218184339.GG20473@aftab> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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@ -327,7 +327,7 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
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/* see errata #382 and #388 */
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if ((boot_cpu_data.x86 == 0x10) &&
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((boot_cpu_data.x86_model < 0x9) ||
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((boot_cpu_data.x86_model < 0x8) ||
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(boot_cpu_data.x86_mask < 0x1)))
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return;
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@ -744,7 +744,7 @@ static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
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unsigned int index)
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{
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int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
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int node = cpu_to_node(cpu);
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int node = amd_get_nb_id(cpu);
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struct pci_dev *dev = node_to_k8_nb_misc(node);
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unsigned int reg = 0;
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@ -771,7 +771,7 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
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const char *buf, size_t count, unsigned int index)
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{
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int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
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int node = cpu_to_node(cpu);
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int node = amd_get_nb_id(cpu);
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struct pci_dev *dev = node_to_k8_nb_misc(node);
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unsigned long val = 0;
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