drm/i915: set the DDI sync polarity bits
During my tests, everything worked even if the wrong polarity was set. Still, we should try to set the correct values. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4312,6 +4312,8 @@
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#define PIPE_DDI_BPC_10 (1<<20)
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#define PIPE_DDI_BPC_6 (2<<20)
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#define PIPE_DDI_BPC_12 (3<<20)
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#define PIPE_DDI_PVSYNC (1<<17)
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#define PIPE_DDI_PHSYNC (1<<16)
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#define PIPE_DDI_BFI_ENABLE (1<<4)
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#define PIPE_DDI_PORT_WIDTH_X1 (0<<1)
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#define PIPE_DDI_PORT_WIDTH_X2 (1<<1)
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@ -727,6 +727,7 @@ void intel_ddi_mode_set(struct drm_encoder *encoder,
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temp &= ~PIPE_DDI_PORT_MASK;
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temp &= ~PIPE_DDI_BPC_12;
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temp &= ~PIPE_DDI_MODE_SELECT_MASK;
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temp &= ~(PIPE_DDI_PVSYNC | PIPE_DDI_PHSYNC);
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temp |= PIPE_DDI_SELECT_PORT(port) |
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((intel_crtc->bpp > 24) ?
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PIPE_DDI_BPC_12 :
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@ -738,6 +739,11 @@ void intel_ddi_mode_set(struct drm_encoder *encoder,
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else
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temp |= PIPE_DDI_MODE_SELECT_DVI;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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temp |= PIPE_DDI_PVSYNC;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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temp |= PIPE_DDI_PHSYNC;
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I915_WRITE(DDI_FUNC_CTL(pipe), temp);
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intel_hdmi->set_infoframes(encoder, adjusted_mode);
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