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ARM: dts: qcom: sdx65: add missing GCC clocks

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The SDX65 GCC clock controller expects two required clocks:
pcie_pipe_clk and usb3_phy_wrapper_gcc_usb30_pipe_clk.  The first one is
provided by existing phy node, but second is not yet implemented.

  qcom-sdx65-mtp.dtb: clock-controller@100000: clocks: [[11, 0], [11, 1], [12]] is too short
  qcom-sdx65-mtp.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk'] is too short

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230924183103.49487-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2023-09-24 20:31:02 +02:00 committed by Bjorn Andersson
parent 94da379dba
commit f64f653df2
1 changed files with 10 additions and 2 deletions
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12
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
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@ -204,8 +204,16 @@
gcc: clock-controller@100000 {
compatible = "qcom,gcc-sdx65";
reg = <0x00100000 0x001f7400>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>;
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>,
<&pcie_phy>,
<0>;
clock-names = "bi_tcxo",
"bi_tcxo_ao",
"sleep_clk",
"pcie_pipe_clk",
"usb3_phy_wrapper_gcc_usb30_pipe_clk";
#power-domain-cells = <1>;
#clock-cells = <1>;
#reset-cells = <1>;