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mtd: spi-nor: Fix mtd size for s3an flashes

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As it was before the blamed commit, s3an_nor_scan() was called
after mtd size was set with params->size, and it overwrote the mtd
size value with '8 * nor->page_size * nor->info->n_sectors' when
XSR_PAGESIZE was set. With the introduction of
s3an_post_sfdp_fixups(), we missed to update the mtd size for the
s3an flashes. Fix the mtd size by updating both nor->params->size,
(which will update the mtd_info size later on) and nor->mtd.size
(which is used in spi_nor_set_addr_width()).

Fixes: 641edddb4f ("mtd: spi-nor: Add s3an_post_sfdp_fixups()")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20211207140254.87681-2-tudor.ambarus@microchip.com
This commit is contained in:
Tudor Ambarus 2021-12-07 16:02:41 +02:00
parent 228e804599
commit f656b419d4
1 changed files with 2 additions and 1 deletions
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3
drivers/mtd/spi-nor/xilinx.c
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@ -69,7 +69,8 @@ static int xilinx_nor_setup(struct spi_nor *nor,
page_size = (nor->params->page_size == 264) ? 256 : 512;
nor->params->page_size = page_size;
nor->mtd.writebufsize = page_size;
nor->mtd.size = 8 * page_size * nor->info->n_sectors;
nor->params->size = 8 * page_size * nor->info->n_sectors;
nor->mtd.size = nor->params->size;
nor->mtd.erasesize = 8 * page_size;
} else {
/* Flash in Default addressing mode */