ARM: LPC32xx: Fix irq on GPI_28
The GPI_28 IRQ was not registered properly. The registration of IRQ_LPC32XX_GPI_28 was added and the (wrong) IRQ_LPC32XX_GPI_11 at LPC32XX_SIC1_IRQ(4) was replaced by IRQ_LPC32XX_GPI_28 (see manual of LPC32xx / interrupt controller). Signed-off-by: Roland Stigge <stigge@antcom.de> Cc: stable@vger.kernel.org
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@ -61,7 +61,7 @@
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*/
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#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
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#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
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#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
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#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
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#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
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#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
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#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
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@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
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.event_group = &lpc32xx_event_pin_regs,
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.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
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},
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[IRQ_LPC32XX_GPI_28] = {
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.event_group = &lpc32xx_event_pin_regs,
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.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
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},
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[IRQ_LPC32XX_GPIO_00] = {
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.event_group = &lpc32xx_event_int_regs,
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.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
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