PCI: Fix typos and whitespace errors
Fix typos in drivers/pci. Comment and whitespace changes only. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
This commit is contained in:
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@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required);
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* @pdev: PCI device structure
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*
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* Returns negative value when PASID capability is not present.
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* Otherwise it returns the numer of supported PASIDs.
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* Otherwise it returns the number of supported PASIDs.
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*/
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int pci_max_pasids(struct pci_dev *pdev)
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{
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@ -55,7 +55,7 @@ struct armada8k_pcie {
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#define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C)
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#define PCIE_AWUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x60)
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/*
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* AR/AW Cache defauls: Normal memory, Write-Back, Read / Write
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* AR/AW Cache defaults: Normal memory, Write-Back, Read / Write
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* allocate
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*/
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#define ARCACHE_DEFAULT_VALUE 0x3511
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@ -2,7 +2,7 @@
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/*
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* PCIe host controller driver for Kirin Phone SoCs
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*
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* Copyright (C) 2017 Hilisicon Electronics Co., Ltd.
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* Copyright (C) 2017 HiSilicon Electronics Co., Ltd.
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* http://www.huawei.com
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*
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* Author: Xiaowei Song <songxiaowei@huawei.com>
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@ -308,7 +308,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
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advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);
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/* Unmask all MSI's */
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/* Unmask all MSIs */
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advk_writel(pcie, 0, PCIE_MSI_MASK_REG);
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/* Enable summary interrupt for GIC SPI source */
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@ -87,7 +87,7 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
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/*
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* DT nodes are not used by all platforms that use the iProc PCIe
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* core driver. For platforms that require explict inbound mapping
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* core driver. For platforms that require explicit inbound mapping
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* configuration, "dma-ranges" would have been present in DT
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*/
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pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges");
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@ -163,7 +163,7 @@ enum iproc_pcie_ib_map_type {
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* @size_unit: inbound mapping region size unit, could be SZ_1K, SZ_1M, or
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* SZ_1G
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* @region_sizes: list of supported inbound mapping region sizes in KB, MB, or
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* GB, depedning on the size unit
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* GB, depending on the size unit
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* @nr_sizes: number of supported inbound mapping region sizes
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* @nr_windows: number of supported inbound mapping windows for the region
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* @imap_addr_offset: register offset between the upper and lower 32-bit
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@ -627,7 +627,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
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* 32-bit resources. __pci_assign_resource() enforces that
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* artificial restriction to make sure everything will fit.
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*
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* The only way we could use a 64-bit non-prefechable MEMBAR is
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* The only way we could use a 64-bit non-prefetchable MEMBAR is
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* if its address is <4GB so that we can convert it to a 32-bit
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* resource. To be visible to the host OS, all VMD endpoints must
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* be initially configured by platform BIOS, which includes setting
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@ -73,7 +73,7 @@ int pci_mmap_resource_range(struct pci_dev *pdev, int bar,
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#elif defined(HAVE_PCI_MMAP) /* && !ARCH_GENERIC_PCI_MMAP_RESOURCE */
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/*
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* Legacy setup: Impement pci_mmap_resource_range() as a wrapper around
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* Legacy setup: Implement pci_mmap_resource_range() as a wrapper around
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* the architecture's pci_mmap_page_range(), converting to "user visible"
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* addresses as necessary.
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*/
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@ -237,7 +237,7 @@ static void msi_set_mask_bit(struct irq_data *data, u32 flag)
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}
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/**
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* pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts
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* pci_msi_mask_irq - Generic IRQ chip callback to mask PCI/MSI interrupts
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* @data: pointer to irqdata associated to that interrupt
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*/
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void pci_msi_mask_irq(struct irq_data *data)
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@ -247,7 +247,7 @@ void pci_msi_mask_irq(struct irq_data *data)
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EXPORT_SYMBOL_GPL(pci_msi_mask_irq);
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/**
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* pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts
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* pci_msi_unmask_irq - Generic IRQ chip callback to unmask PCI/MSI interrupts
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* @data: pointer to irqdata associated to that interrupt
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*/
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void pci_msi_unmask_irq(struct irq_data *data)
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@ -588,11 +588,11 @@ static int msi_verify_entries(struct pci_dev *dev)
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* msi_capability_init - configure device's MSI capability structure
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* @dev: pointer to the pci_dev data structure of MSI device function
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* @nvec: number of interrupts to allocate
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* @affd: description of automatic irq affinity assignments (may be %NULL)
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* @affd: description of automatic IRQ affinity assignments (may be %NULL)
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*
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* Setup the MSI capability structure of the device with the requested
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* number of interrupts. A return value of zero indicates the successful
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* setup of an entry with the new MSI irq. A negative return value indicates
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* setup of an entry with the new MSI IRQ. A negative return value indicates
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* an error, and a positive return value indicates the number of interrupts
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* which could have been allocated.
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*/
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@ -609,7 +609,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec,
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if (!entry)
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return -ENOMEM;
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/* All MSIs are unmasked by default, Mask them all */
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/* All MSIs are unmasked by default; mask them all */
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mask = msi_mask(entry->msi_attrib.multi_cap);
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msi_mask_irq(entry, mask, mask);
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@ -637,7 +637,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec,
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return ret;
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}
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/* Set MSI enabled bits */
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/* Set MSI enabled bits */
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pci_intx_for_msi(dev, 0);
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pci_msi_set_enable(dev, 1);
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dev->msi_enabled = 1;
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@ -729,11 +729,11 @@ static void msix_program_entries(struct pci_dev *dev,
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* @dev: pointer to the pci_dev data structure of MSI-X device function
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* @entries: pointer to an array of struct msix_entry entries
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* @nvec: number of @entries
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* @affd: Optional pointer to enable automatic affinity assignement
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* @affd: Optional pointer to enable automatic affinity assignment
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*
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* Setup the MSI-X capability structure of device function with a
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* single MSI-X irq. A return of zero indicates the successful setup of
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* requested MSI-X entries with allocated irqs or non-zero for otherwise.
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* single MSI-X IRQ. A return of zero indicates the successful setup of
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* requested MSI-X entries with allocated IRQs or non-zero for otherwise.
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**/
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static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries,
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int nvec, struct irq_affinity *affd)
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@ -789,7 +789,7 @@ static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries,
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out_avail:
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if (ret < 0) {
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/*
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* If we had some success, report the number of irqs
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* If we had some success, report the number of IRQs
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* we succeeded in setting up.
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*/
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struct msi_desc *entry;
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@ -812,7 +812,7 @@ out_free:
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/**
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* pci_msi_supported - check whether MSI may be enabled on a device
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* @dev: pointer to the pci_dev data structure of MSI device function
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* @nvec: how many MSIs have been requested ?
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* @nvec: how many MSIs have been requested?
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*
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* Look at global flags, the device itself, and its parent buses
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* to determine if MSI/-X are supported for the device. If MSI/-X is
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@ -896,7 +896,7 @@ static void pci_msi_shutdown(struct pci_dev *dev)
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/* Keep cached state to be restored */
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__pci_msi_desc_mask_irq(desc, mask, ~mask);
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/* Restore dev->irq to its default pin-assertion irq */
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/* Restore dev->irq to its default pin-assertion IRQ */
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dev->irq = desc->msi_attrib.default_irq;
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pcibios_alloc_irq(dev);
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}
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@ -958,7 +958,7 @@ static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
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}
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}
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/* Check whether driver already requested for MSI irq */
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/* Check whether driver already requested for MSI IRQ */
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if (dev->msi_enabled) {
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pci_info(dev, "can't enable MSI-X (MSI IRQ already assigned)\n");
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return -EINVAL;
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@ -1026,7 +1026,7 @@ static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
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if (!pci_msi_supported(dev, minvec))
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return -EINVAL;
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/* Check whether driver already requested MSI-X irqs */
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/* Check whether driver already requested MSI-X IRQs */
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if (dev->msix_enabled) {
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pci_info(dev, "can't enable MSI (MSI-X already enabled)\n");
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return -EINVAL;
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@ -1113,8 +1113,8 @@ static int __pci_enable_msix_range(struct pci_dev *dev,
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* pci_enable_msix_range - configure device's MSI-X capability structure
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* @dev: pointer to the pci_dev data structure of MSI-X device function
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* @entries: pointer to an array of MSI-X entries
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* @minvec: minimum number of MSI-X irqs requested
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* @maxvec: maximum number of MSI-X irqs requested
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* @minvec: minimum number of MSI-X IRQs requested
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* @maxvec: maximum number of MSI-X IRQs requested
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*
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* Setup the MSI-X capability structure of device function with a maximum
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* possible number of interrupts in the range between @minvec and @maxvec
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@ -1179,7 +1179,7 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
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return msi_vecs;
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}
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/* use legacy irq if allowed */
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/* use legacy IRQ if allowed */
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if (flags & PCI_IRQ_LEGACY) {
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if (min_vecs == 1 && dev->irq) {
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/*
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@ -1248,7 +1248,7 @@ int pci_irq_vector(struct pci_dev *dev, unsigned int nr)
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EXPORT_SYMBOL(pci_irq_vector);
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/**
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* pci_irq_get_affinity - return the affinity of a particular msi vector
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* pci_irq_get_affinity - return the affinity of a particular MSI vector
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* @dev: PCI device to operate on
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* @nr: device-relative interrupt vector index (0-based).
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*/
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@ -1280,7 +1280,7 @@ const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr)
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EXPORT_SYMBOL(pci_irq_get_affinity);
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/**
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* pci_irq_get_node - return the numa node of a particular msi vector
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* pci_irq_get_node - return the NUMA node of a particular MSI vector
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* @pdev: PCI device to operate on
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* @vec: device-relative interrupt vector index (0-based).
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*/
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@ -1330,7 +1330,7 @@ void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
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/**
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* pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source
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* @dev: Pointer to the PCI device
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* @desc: Pointer to the msi descriptor
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* @desc: Pointer to the MSI descriptor
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*
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* The ID number is only used within the irqdomain.
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*/
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@ -1348,7 +1348,8 @@ static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc)
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}
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/**
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* pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev
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* pci_msi_domain_check_cap - Verify that @domain supports the capabilities
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* for @dev
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* @domain: The interrupt domain to check
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* @info: The domain info for verification
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* @dev: The device to check
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@ -223,7 +223,7 @@ EXPORT_SYMBOL_GPL(pci_p2pdma_add_resource);
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/*
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* Note this function returns the parent PCI device with a
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* reference taken. It is the caller's responsibily to drop
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* reference taken. It is the caller's responsibility to drop
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* the reference.
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*/
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static struct pci_dev *find_parent_pci_dev(struct device *dev)
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@ -380,7 +380,7 @@ static int upstream_bridge_distance(struct pci_dev *provider,
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/*
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* Allow the connection if both devices are on a whitelisted root
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* complex, but add an arbitary large value to the distance.
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* complex, but add an arbitrary large value to the distance.
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*/
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if (root_complex_whitelist(provider) &&
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root_complex_whitelist(client))
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@ -439,7 +439,7 @@ static int upstream_bridge_distance_warn(struct pci_dev *provider,
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}
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/**
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* pci_p2pdma_distance_many - Determive the cumulative distance between
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* pci_p2pdma_distance_many - Determine the cumulative distance between
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* a p2pdma provider and the clients in use.
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* @provider: p2pdma provider to check against the client list
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* @clients: array of devices to check (NULL-terminated)
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@ -305,7 +305,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
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}
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/*
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* Cleanup a pci_bridge_emul structure that was previously initilized
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* Cleanup a pci_bridge_emul structure that was previously initialized
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* using pci_bridge_emul_init().
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*/
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void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge)
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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/* pci-pf-stub - simple stub driver for PCI SR-IOV PF device
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*
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* This driver is meant to act as a "whitelist" for devices that provde
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* This driver is meant to act as a "whitelist" for devices that provide
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* SR-IOV functionality while at the same time not actually needing a
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* driver of their own.
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*/
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@ -4501,7 +4501,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe)
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/*
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* Wait for Transaction Pending bit to clear. A word-aligned test
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* is used, so we use the conrol offset rather than status and shift
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* is used, so we use the control offset rather than status and shift
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* the test bit to match.
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*/
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if (!pci_wait_for_pending(dev, pos + PCI_AF_CTRL,
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@ -2,7 +2,7 @@
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/*
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* PCIe AER software error injection support.
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*
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* Debuging PCIe AER code is quite difficult because it is hard to
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* Debugging PCIe AER code is quite difficult because it is hard to
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* trigger various real hardware errors. Software based error
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* injection can fake almost all kinds of errors with the help of a
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* user space helper tool aer-inject, which can be gotten from:
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@ -382,7 +382,7 @@ struct pci_dev {
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unsigned int is_busmaster:1; /* Is busmaster */
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unsigned int no_msi:1; /* May not use MSI */
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unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
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unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
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unsigned int block_cfg_access:1; /* Config space access blocked */
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unsigned int broken_parity_status:1; /* Generates false positive parity */
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unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */
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@ -1112,7 +1112,7 @@
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#define PCI_VENDOR_ID_AL 0x10b9
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#define PCI_DEVICE_ID_AL_M1533 0x1533
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#define PCI_DEVICE_ID_AL_M1535 0x1535
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#define PCI_DEVICE_ID_AL_M1535 0x1535
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#define PCI_DEVICE_ID_AL_M1541 0x1541
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#define PCI_DEVICE_ID_AL_M1563 0x1563
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#define PCI_DEVICE_ID_AL_M1621 0x1621
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@ -1752,7 +1752,7 @@
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#define PCI_VENDOR_ID_STALLION 0x124d
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/* Allied Telesyn */
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#define PCI_VENDOR_ID_AT 0x1259
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#define PCI_VENDOR_ID_AT 0x1259
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#define PCI_SUBDEVICE_ID_AT_2700FX 0x2701
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#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703
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@ -2550,7 +2550,7 @@
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#define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700
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#define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff
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#define PCI_VENDOR_ID_HUAWEI 0x19e5
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#define PCI_VENDOR_ID_HUAWEI 0x19e5
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#define PCI_VENDOR_ID_NETRONOME 0x19ee
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#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
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