drm/amd/display: Program OPP before ODM
[WHY] HW expects OPP to be configured before ODM is enabled. Failure to do so can cause errors. Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1509,6 +1509,31 @@ static enum dc_status apply_single_controller_ctx_to_hw(
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if (!pipe_ctx->stream->apply_seamless_boot_optimization && dc->config.use_pipe_ctx_sync_logic)
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check_syncd_pipes_for_disabled_master_pipe(dc, context, pipe_ctx->pipe_idx);
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pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
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pipe_ctx->stream_res.opp,
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&stream->bit_depth_params,
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&stream->clamping);
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pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(
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pipe_ctx->stream_res.opp,
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COLOR_SPACE_YCBCR601,
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stream->timing.display_color_depth,
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stream->signal);
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while (odm_pipe) {
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odm_pipe->stream_res.opp->funcs->opp_set_dyn_expansion(
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odm_pipe->stream_res.opp,
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COLOR_SPACE_YCBCR601,
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stream->timing.display_color_depth,
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stream->signal);
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odm_pipe->stream_res.opp->funcs->opp_program_fmt(
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odm_pipe->stream_res.opp,
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&stream->bit_depth_params,
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&stream->clamping);
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odm_pipe = odm_pipe->next_odm_pipe;
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}
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/* DCN3.1 FPGA Workaround
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* Need to enable HPO DP Stream Encoder before setting OTG master enable.
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* To do so, move calling function enable_stream_timing to only be done AFTER calling
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@ -1548,30 +1573,6 @@ static enum dc_status apply_single_controller_ctx_to_hw(
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if (dc_is_dp_signal(pipe_ctx->stream->signal))
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dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_OTG);
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pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(
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pipe_ctx->stream_res.opp,
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COLOR_SPACE_YCBCR601,
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stream->timing.display_color_depth,
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stream->signal);
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pipe_ctx->stream_res.opp->funcs->opp_program_fmt(
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pipe_ctx->stream_res.opp,
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&stream->bit_depth_params,
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&stream->clamping);
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while (odm_pipe) {
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odm_pipe->stream_res.opp->funcs->opp_set_dyn_expansion(
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odm_pipe->stream_res.opp,
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COLOR_SPACE_YCBCR601,
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stream->timing.display_color_depth,
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stream->signal);
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odm_pipe->stream_res.opp->funcs->opp_program_fmt(
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odm_pipe->stream_res.opp,
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&stream->bit_depth_params,
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&stream->clamping);
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odm_pipe = odm_pipe->next_odm_pipe;
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}
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if (!stream->dpms_off)
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core_link_enable_stream(context, pipe_ctx);
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