iio: adc: max1118: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: a9e9c7153e96 ("iio: adc: add max1117/max1118/max1119 ADC driver") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-26-jic23@kernel.org
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@ -42,7 +42,7 @@ struct max1118 {
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s64 ts __aligned(8);
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} scan;
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u8 data ____cacheline_aligned;
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u8 data __aligned(IIO_DMA_MINALIGN);
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};
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#define MAX1118_CHANNEL(ch) \
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