ARM: mvebu: Move SCU power up in a function
This will allow reusing the same function in the secondary_startup for the Cortex A9 SoC. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1414669184-16785-3-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -12,6 +12,18 @@
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#include <linux/linkage.h>
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/assembler.h>
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ENTRY(armada_38x_scu_power_up)
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mrc p15, 4, r1, c15, c0 @ get SCU base address
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orr r1, r1, #0x8 @ SCU CPU Power Status Register
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mrc 15, 0, r0, cr0, cr0, 5 @ get the CPU ID
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and r0, r0, #15
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add r1, r1, r0
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mov r0, #0x0
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strb r0, [r1] @ switch SCU power state to Normal mode
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ret lr
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ENDPROC(armada_38x_scu_power_up)
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/*
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/*
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* This is the entry point through which CPUs exiting cpuidle deep
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* This is the entry point through which CPUs exiting cpuidle deep
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* idle state are going.
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* idle state are going.
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@ -27,13 +39,7 @@ ENTRY(armada_38x_cpu_resume)
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/* do we need it for Armada 38x*/
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/* do we need it for Armada 38x*/
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ARM_BE8(setend be ) @ go BE8 if entered LE
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ARM_BE8(setend be ) @ go BE8 if entered LE
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bl v7_invalidate_l1
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bl v7_invalidate_l1
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mrc p15, 4, r1, c15, c0 @ get SCU base address
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bl armada_38x_scu_power_up
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orr r1, r1, #0x8 @ SCU CPU Power Status Register
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mrc 15, 0, r0, cr0, cr0, 5 @ get the CPU ID
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and r0, r0, #15
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add r1, r1, r0
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mov r0, #0x0
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strb r0, [r1] @ switch SCU power state to Normal mode
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b cpu_resume
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b cpu_resume
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ENDPROC(armada_38x_cpu_resume)
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ENDPROC(armada_38x_cpu_resume)
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