staging: comedi: mite.h: reformat some comments
Use the usual style for block comments. Squash double spaces after comment opening sequences. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1,20 +1,20 @@
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/*
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module/mite.h
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Hardware driver for NI Mite PCI interface chip
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COMEDI - Linux Control and Measurement Device Interface
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Copyright (C) 1999 David A. Schleef <ds@schleef.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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*/
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* module/mite.h
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* Hardware driver for NI Mite PCI interface chip
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*
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* COMEDI - Linux Control and Measurement Device Interface
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* Copyright (C) 1999 David A. Schleef <ds@schleef.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MITE_H_
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#define _MITE_H_
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@ -115,12 +115,14 @@ int mite_buf_change(struct mite_dma_descriptor_ring *ring,
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struct comedi_subdevice *s);
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enum mite_registers {
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/* The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be
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written and read back. The bits 0x1f always read as 1.
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The rest always read as zero. */
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/*
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* The bits 0x90180700 in MITE_UNKNOWN_DMA_BURST_REG can be
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* written and read back. The bits 0x1f always read as 1.
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* The rest always read as zero.
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*/
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MITE_UNKNOWN_DMA_BURST_REG = 0x28,
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MITE_IODWBSR = 0xc0, /* IO Device Window Base Size Register */
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MITE_IODWBSR_1 = 0xc4, /* IO Device Window Base Size Register 1 */
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MITE_IODWBSR_1 = 0xc4, /* IO Device Window Base Size Register 1 */
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MITE_IODWCR_1 = 0xf4,
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MITE_PCI_CONFIG_OFFSET = 0x300,
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MITE_CSIGR = 0x460 /* chip signature */
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@ -146,7 +148,7 @@ enum mite_registers {
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#define MITE_FCR(x) (0x40 + MITE_CHAN(x)) /* fifo count */
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enum MITE_IODWBSR_bits {
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WENAB = 0x80, /* window enable */
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WENAB = 0x80, /* window enable */
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};
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static inline unsigned MITE_IODWBSR_1_WSIZE_bits(unsigned size)
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@ -169,27 +171,27 @@ static inline int mite_csigr_version(u32 csigr_bits)
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};
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static inline int mite_csigr_type(u32 csigr_bits)
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{ /* original mite = 0, minimite = 1 */
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{ /* original mite = 0, minimite = 1 */
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return (csigr_bits >> 4) & 0xf;
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};
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static inline int mite_csigr_mmode(u32 csigr_bits)
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{ /* mite mode, minimite = 1 */
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{ /* mite mode, minimite = 1 */
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return (csigr_bits >> 8) & 0x3;
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};
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static inline int mite_csigr_imode(u32 csigr_bits)
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{ /* cpu port interface mode, pci = 0x3 */
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{ /* cpu port interface mode, pci = 0x3 */
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return (csigr_bits >> 12) & 0x3;
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};
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static inline int mite_csigr_dmac(u32 csigr_bits)
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{ /* number of dma channels */
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{ /* number of dma channels */
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return (csigr_bits >> 16) & 0xf;
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};
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static inline int mite_csigr_wpdep(u32 csigr_bits)
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{ /* write post fifo depth */
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{ /* write post fifo depth */
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unsigned int wpdep_bits = (csigr_bits >> 20) & 0x7;
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return (wpdep_bits) ? (1 << (wpdep_bits - 1)) : 0;
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@ -201,7 +203,7 @@ static inline int mite_csigr_wins(u32 csigr_bits)
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};
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static inline int mite_csigr_iowins(u32 csigr_bits)
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{ /* number of io windows */
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{ /* number of io windows */
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return (csigr_bits >> 29) & 0x7;
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};
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@ -290,8 +292,7 @@ static inline int CR_REQS(int source)
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static inline int CR_REQSDRQ(unsigned drq_line)
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{
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/* This also works on m-series when
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using channels (drq_line) 4 or 5. */
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/* This also works on m-series when using channels (drq_line) 4 or 5. */
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return CR_REQS((drq_line & 0x3) | 0x4);
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}
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