Merge branch 'parisc-4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller: "The first three patches are trivial and add some required KERN_CONT, ignore the new pkey syscalls on parisc and use the LINUX_GATEWAY_ADDR define instead of hardcoded values. The two patches from Dave Anglin are important. The first one avoids trashing the sr2 and sr3 space registers in the Light-weight syscall path. Especially the usage of sr3 is critical since it may get trashed by the interrupt handler. The second patch is even more important and tagged for stable series. It protects one critical section in the syscall entry path by disabling local interrupts. Without disabling interrupts, the sr7 space register may not be in sync with the current stack setup and thus an incoming hardware interrupt may destroy memory in random userspace areas" * 'parisc-4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Ignore the pkey system calls for now parisc: Use LINUX_GATEWAY_ADDR define instead of hardcoded value parisc: Ensure consistent state when switching to kernel stack at syscall entry parisc: Avoid trashing sr2 and sr3 in LWS code parisc: use KERN_CONT when printing device inventory
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commit
f7df76e6ac
@ -368,7 +368,9 @@
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#define __IGNORE_select /* newselect */
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#define __IGNORE_fadvise64 /* fadvise64_64 */
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#define __IGNORE_pkey_mprotect
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#define __IGNORE_pkey_alloc
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#define __IGNORE_pkey_free
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#define LINUX_GATEWAY_ADDR 0x100
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@ -873,11 +873,11 @@ static void print_parisc_device(struct parisc_device *dev)
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if (dev->num_addrs) {
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int k;
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printk(", additional addresses: ");
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pr_cont(", additional addresses: ");
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for (k = 0; k < dev->num_addrs; k++)
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printk("0x%lx ", dev->addr[k]);
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pr_cont("0x%lx ", dev->addr[k]);
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}
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printk("\n");
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pr_cont("\n");
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}
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/**
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@ -100,14 +100,12 @@ set_thread_pointer:
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.endr
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/* This address must remain fixed at 0x100 for glibc's syscalls to work */
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.align 256
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.align LINUX_GATEWAY_ADDR
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linux_gateway_entry:
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gate .+8, %r0 /* become privileged */
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mtsp %r0,%sr4 /* get kernel space into sr4 */
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mtsp %r0,%sr5 /* get kernel space into sr5 */
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mtsp %r0,%sr6 /* get kernel space into sr6 */
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mfsp %sr7,%r1 /* save user sr7 */
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mtsp %r1,%sr3 /* and store it in sr3 */
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#ifdef CONFIG_64BIT
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/* for now we can *always* set the W bit on entry to the syscall
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@ -133,6 +131,14 @@ linux_gateway_entry:
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depdi 0, 31, 32, %r21
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1:
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#endif
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/* We use a rsm/ssm pair to prevent sr3 from being clobbered
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* by external interrupts.
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*/
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mfsp %sr7,%r1 /* save user sr7 */
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rsm PSW_SM_I, %r0 /* disable interrupts */
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mtsp %r1,%sr3 /* and store it in sr3 */
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mfctl %cr30,%r1
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xor %r1,%r30,%r30 /* ye olde xor trick */
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xor %r1,%r30,%r1
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@ -147,6 +153,7 @@ linux_gateway_entry:
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*/
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mtsp %r0,%sr7 /* get kernel space into sr7 */
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ssm PSW_SM_I, %r0 /* enable interrupts */
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STREGM %r1,FRAME_SIZE(%r30) /* save r1 (usp) here for now */
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mfctl %cr30,%r1 /* get task ptr in %r1 */
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LDREG TI_TASK(%r1),%r1
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@ -474,11 +481,6 @@ lws_start:
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comiclr,>> __NR_lws_entries, %r20, %r0
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b,n lws_exit_nosys
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/* WARNING: Trashing sr2 and sr3 */
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mfsp %sr7,%r1 /* get userspace into sr3 */
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mtsp %r1,%sr3
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mtsp %r0,%sr2 /* get kernel space into sr2 */
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/* Load table start */
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ldil L%lws_table, %r1
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ldo R%lws_table(%r1), %r28 /* Scratch use of r28 */
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@ -627,9 +629,9 @@ cas_action:
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stw %r1, 4(%sr2,%r20)
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#endif
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/* The load and store could fail */
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1: ldw,ma 0(%sr3,%r26), %r28
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1: ldw,ma 0(%r26), %r28
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sub,<> %r28, %r25, %r0
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2: stw,ma %r24, 0(%sr3,%r26)
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2: stw,ma %r24, 0(%r26)
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/* Free lock */
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stw,ma %r20, 0(%sr2,%r20)
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#if ENABLE_LWS_DEBUG
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@ -706,9 +708,9 @@ lws_compare_and_swap_2:
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nop
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/* 8bit load */
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4: ldb 0(%sr3,%r25), %r25
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4: ldb 0(%r25), %r25
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b cas2_lock_start
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5: ldb 0(%sr3,%r24), %r24
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5: ldb 0(%r24), %r24
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nop
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nop
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nop
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@ -716,9 +718,9 @@ lws_compare_and_swap_2:
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nop
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/* 16bit load */
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6: ldh 0(%sr3,%r25), %r25
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6: ldh 0(%r25), %r25
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b cas2_lock_start
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7: ldh 0(%sr3,%r24), %r24
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7: ldh 0(%r24), %r24
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nop
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nop
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nop
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@ -726,9 +728,9 @@ lws_compare_and_swap_2:
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nop
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/* 32bit load */
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8: ldw 0(%sr3,%r25), %r25
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8: ldw 0(%r25), %r25
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b cas2_lock_start
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9: ldw 0(%sr3,%r24), %r24
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9: ldw 0(%r24), %r24
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nop
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nop
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nop
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@ -737,14 +739,14 @@ lws_compare_and_swap_2:
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/* 64bit load */
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#ifdef CONFIG_64BIT
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10: ldd 0(%sr3,%r25), %r25
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11: ldd 0(%sr3,%r24), %r24
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10: ldd 0(%r25), %r25
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11: ldd 0(%r24), %r24
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#else
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/* Load new value into r22/r23 - high/low */
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10: ldw 0(%sr3,%r25), %r22
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11: ldw 4(%sr3,%r25), %r23
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10: ldw 0(%r25), %r22
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11: ldw 4(%r25), %r23
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/* Load new value into fr4 for atomic store later */
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12: flddx 0(%sr3,%r24), %fr4
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12: flddx 0(%r24), %fr4
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#endif
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cas2_lock_start:
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@ -794,30 +796,30 @@ cas2_action:
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ldo 1(%r0),%r28
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/* 8bit CAS */
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13: ldb,ma 0(%sr3,%r26), %r29
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13: ldb,ma 0(%r26), %r29
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sub,= %r29, %r25, %r0
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b,n cas2_end
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14: stb,ma %r24, 0(%sr3,%r26)
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14: stb,ma %r24, 0(%r26)
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b cas2_end
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copy %r0, %r28
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nop
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nop
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/* 16bit CAS */
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15: ldh,ma 0(%sr3,%r26), %r29
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15: ldh,ma 0(%r26), %r29
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sub,= %r29, %r25, %r0
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b,n cas2_end
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16: sth,ma %r24, 0(%sr3,%r26)
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16: sth,ma %r24, 0(%r26)
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b cas2_end
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copy %r0, %r28
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nop
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nop
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/* 32bit CAS */
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17: ldw,ma 0(%sr3,%r26), %r29
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17: ldw,ma 0(%r26), %r29
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sub,= %r29, %r25, %r0
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b,n cas2_end
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18: stw,ma %r24, 0(%sr3,%r26)
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18: stw,ma %r24, 0(%r26)
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b cas2_end
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copy %r0, %r28
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nop
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@ -825,22 +827,22 @@ cas2_action:
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/* 64bit CAS */
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#ifdef CONFIG_64BIT
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19: ldd,ma 0(%sr3,%r26), %r29
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19: ldd,ma 0(%r26), %r29
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sub,*= %r29, %r25, %r0
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b,n cas2_end
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20: std,ma %r24, 0(%sr3,%r26)
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20: std,ma %r24, 0(%r26)
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copy %r0, %r28
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#else
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/* Compare first word */
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19: ldw,ma 0(%sr3,%r26), %r29
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19: ldw,ma 0(%r26), %r29
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sub,= %r29, %r22, %r0
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b,n cas2_end
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/* Compare second word */
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20: ldw,ma 4(%sr3,%r26), %r29
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20: ldw,ma 4(%r26), %r29
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sub,= %r29, %r23, %r0
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b,n cas2_end
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/* Perform the store */
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21: fstdx %fr4, 0(%sr3,%r26)
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21: fstdx %fr4, 0(%r26)
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copy %r0, %r28
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#endif
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