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arm64: dts: ti: k3-j721e-sk: Model CSI2RX connector mux

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J721E SK has the CSI2RX routed to a MIPI CSI connector and to 15-pin
RPi camera connector through an analog mux with GPIO control, model that
so that an overlay can control the mux state according to connected
cameras. Also provide labels to the I2C mux bus instances so that a
generic overlay can be used across multiple platforms.

J721E SK schematics: https://www.ti.com/lit/zip/sprr438

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20240215085518.552692-6-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Vaishnav Achath 2024-02-15 14:25:14 +05:30 committed by Vignesh Raghavendra
parent 12d82b15b9
commit f87c889473
1 changed files with 17 additions and 2 deletions
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19
arch/arm64/boot/dts/ti/k3-j721e-sk.dts
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@ -286,6 +286,15 @@
};
};
};
csi_mux: mux-controller {
compatible = "gpio-mux";
#mux-state-cells = <1>;
mux-gpios = <&main_gpio0 88 GPIO_ACTIVE_HIGH>;
idle-state = <0>;
pinctrl-names = "default";
pinctrl-0 = <&main_csi_mux_sel_pins_default>;
};
};
&main_pmx0 {
@ -352,6 +361,12 @@
>;
};
main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x164, PIN_OUTPUT, 7) /* (V29) RGMII5_TD2 */
>;
};
dp0_pins_default: dp0-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */
@ -858,14 +873,14 @@
reg = <0x70>;
/* CSI0 I2C */
i2c@0 {
cam0_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
/* CSI1 I2C */
i2c@1 {
cam1_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;