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net: phy: marvell: fix typo in constant MII_M1011_PHY_SRC_DOWNSHIFT_MASK

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Fix typo and use PHY_SCR for PHY-specific Control Register.

Fixes: a3bdfce7bf9c ("net: phy: marvell: support downshift as PHY tunable")
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Heiner Kallweit 2019-10-28 20:52:22 +01:00 committed by David S. Miller
parent e528afb72a
commit f8d975be71
1 changed files with 4 additions and 4 deletions
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8
drivers/net/phy/marvell.c
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@ -53,7 +53,7 @@
#define MII_M1011_PHY_SCR 0x10
#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
#define MII_M1011_PHY_SRC_DOWNSHIFT_MASK GENMASK(14, 12)
#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
@ -793,7 +793,7 @@ static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
return val;
enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
cnt = FIELD_GET(MII_M1011_PHY_SRC_DOWNSHIFT_MASK, val) + 1;
cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
@ -812,11 +812,11 @@ static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
MII_M1011_PHY_SCR_DOWNSHIFT_EN);
val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
val |= FIELD_PREP(MII_M1011_PHY_SRC_DOWNSHIFT_MASK, cnt - 1);
val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
return phy_modify(phydev, MII_M1011_PHY_SCR,
MII_M1011_PHY_SCR_DOWNSHIFT_EN |
MII_M1011_PHY_SRC_DOWNSHIFT_MASK,
MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
val);
}