EDAC: Add RDDR5 and LRDDR5 memory types
Include Registered-DDR5 and Load-Reduced DDR5 in the list of memory types. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211208174356.1997855-2-yazen.ghannam@amd.com
This commit is contained in:
parent
0fcfb00b28
commit
f957112423
@ -162,6 +162,8 @@ const char * const edac_mem_types[] = {
|
||||
[MEM_LPDDR4] = "Low-Power-DDR4-RAM",
|
||||
[MEM_LRDDR4] = "Load-Reduced-DDR4-RAM",
|
||||
[MEM_DDR5] = "Unbuffered-DDR5",
|
||||
[MEM_RDDR5] = "Registered-DDR5",
|
||||
[MEM_LRDDR5] = "Load-Reduced-DDR5-RAM",
|
||||
[MEM_NVDIMM] = "Non-volatile-RAM",
|
||||
[MEM_WIO2] = "Wide-IO-2",
|
||||
[MEM_HBM2] = "High-bandwidth-memory-Gen2",
|
||||
|
@ -182,6 +182,8 @@ static inline char *mc_event_error_type(const unsigned int err_type)
|
||||
* @MEM_LRDDR4: Load-Reduced DDR4 memory.
|
||||
* @MEM_LPDDR4: Low-Power DDR4 memory.
|
||||
* @MEM_DDR5: Unbuffered DDR5 RAM
|
||||
* @MEM_RDDR5: Registered DDR5 RAM
|
||||
* @MEM_LRDDR5: Load-Reduced DDR5 memory.
|
||||
* @MEM_NVDIMM: Non-volatile RAM
|
||||
* @MEM_WIO2: Wide I/O 2.
|
||||
* @MEM_HBM2: High bandwidth Memory Gen 2.
|
||||
@ -211,6 +213,8 @@ enum mem_type {
|
||||
MEM_LRDDR4,
|
||||
MEM_LPDDR4,
|
||||
MEM_DDR5,
|
||||
MEM_RDDR5,
|
||||
MEM_LRDDR5,
|
||||
MEM_NVDIMM,
|
||||
MEM_WIO2,
|
||||
MEM_HBM2,
|
||||
@ -239,6 +243,8 @@ enum mem_type {
|
||||
#define MEM_FLAG_LRDDR4 BIT(MEM_LRDDR4)
|
||||
#define MEM_FLAG_LPDDR4 BIT(MEM_LPDDR4)
|
||||
#define MEM_FLAG_DDR5 BIT(MEM_DDR5)
|
||||
#define MEM_FLAG_RDDR5 BIT(MEM_RDDR5)
|
||||
#define MEM_FLAG_LRDDR5 BIT(MEM_LRDDR5)
|
||||
#define MEM_FLAG_NVDIMM BIT(MEM_NVDIMM)
|
||||
#define MEM_FLAG_WIO2 BIT(MEM_WIO2)
|
||||
#define MEM_FLAG_HBM2 BIT(MEM_HBM2)
|
||||
|
Loading…
Reference in New Issue
Block a user