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ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link

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DT currently lists the port mode for the 88E6352 switch 1 to 88E6185
switch 2 as "rgmii-id" but referring to the schematics, it is in fact
a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and
S_MODE=1, which means port 5 is configured as 1000BASE-X.

This is confirmed by the value in the 88E6352 port 5 status register,
0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by
the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning
cross-chip SERDES mode is selected.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Russell King (Oracle) 2021-10-20 16:50:13 +01:00 committed by Shawn Guo
parent fa55b7dcdc
commit f9d3b807da
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
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@ -149,7 +149,7 @@
reg = <5>;
label = "dsa";
link = <&switch2port9>;
phy-mode = "rgmii-txid";
phy-mode = "1000base-x";
fixed-link {
speed = <1000>;
@ -252,7 +252,7 @@
switch2port9: port@9 {
reg = <9>;
label = "dsa";
phy-mode = "rgmii-txid";
phy-mode = "1000base-x";
link = <&switch1port5
&switch0port5>;