iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clk: bd718xx: Drop BD70528 support

Browse Source 
The only known BD70528 use-cases are such that the PMIC is controlled
from separate MCU which is not running Linux. I am not aware of
any Linux driver users. Furthermore, it seems there is no demand for
this IC. Let's ease the maintenance burden and drop the driver. We can
always add it back if there is sudden need for it.

Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Link: https://lore.kernel.org/r/937ed0828486a08e2d00bce2815d491c1c9c49b4.1621937490.git.matti.vaittinen@fi.rohmeurope.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Matti Vaittinen 2021-05-25 13:15:10 +03:00 committed by Stephen Boyd
parent 6efb943b86
commit fa5b654142
2 changed files with 5 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/clk/Kconfig
View File

@ -358,10 +358,10 @@ config COMMON_CLK_MMP2_AUDIO
config COMMON_CLK_BD718XX config COMMON_CLK_BD718XX
tristate "Clock driver for 32K clk gates on ROHM PMICs" tristate "Clock driver for 32K clk gates on ROHM PMICs"
depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
help help
This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and This driver supports ROHM BD71837, BD71847, BD71850, BD71815
ROHM BD70528 PMICs clock gates. and BD71828 PMICs clock gates.
config COMMON_CLK_FIXED_MMIO config COMMON_CLK_FIXED_MMIO
bool "Clock driver for Memory Mapped Fixed values" bool "Clock driver for Memory Mapped Fixed values"

11
drivers/clk/clk-bd718x7.c
View File

@ -15,15 +15,13 @@
/* clk control registers */ /* clk control registers */
/* BD71815 */ /* BD71815 */
#define BD71815_REG_OUT32K 0x1d #define BD71815_REG_OUT32K 0x1d
/* BD70528 */
#define BD70528_REG_OUT32K 0x2c
/* BD71828 */ /* BD71828 */
#define BD71828_REG_OUT32K 0x4B #define BD71828_REG_OUT32K 0x4B
/* BD71837 and BD71847 */ /* BD71837 and BD71847 */
#define BD718XX_REG_OUT32K 0x2E #define BD718XX_REG_OUT32K 0x2E
/* /*
* BD71837, BD71847, BD70528 and BD71828 all use bit [0] to clk output control * BD71837, BD71847, and BD71828 all use bit [0] to clk output control
*/ */
#define CLK_OUT_EN_MASK BIT(0) #define CLK_OUT_EN_MASK BIT(0)
@ -116,10 +114,6 @@ static int bd71837_clk_probe(struct platform_device *pdev)
c->reg = BD71828_REG_OUT32K; c->reg = BD71828_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK; c->mask = CLK_OUT_EN_MASK;
break; break;
case ROHM_CHIP_TYPE_BD70528:
c->reg = BD70528_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD71815: case ROHM_CHIP_TYPE_BD71815:
c->reg = BD71815_REG_OUT32K; c->reg = BD71815_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK; c->mask = CLK_OUT_EN_MASK;
@ -150,7 +144,6 @@ static int bd71837_clk_probe(struct platform_device *pdev)
static const struct platform_device_id bd718x7_clk_id[] = { static const struct platform_device_id bd718x7_clk_id[] = {
{ "bd71837-clk", ROHM_CHIP_TYPE_BD71837 }, { "bd71837-clk", ROHM_CHIP_TYPE_BD71837 },
{ "bd71847-clk", ROHM_CHIP_TYPE_BD71847 }, { "bd71847-clk", ROHM_CHIP_TYPE_BD71847 },
{ "bd70528-clk", ROHM_CHIP_TYPE_BD70528 },
{ "bd71828-clk", ROHM_CHIP_TYPE_BD71828 }, { "bd71828-clk", ROHM_CHIP_TYPE_BD71828 },
{ "bd71815-clk", ROHM_CHIP_TYPE_BD71815 }, { "bd71815-clk", ROHM_CHIP_TYPE_BD71815 },
{ }, { },
@ -168,6 +161,6 @@ static struct platform_driver bd71837_clk = {
module_platform_driver(bd71837_clk); module_platform_driver(bd71837_clk);
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>"); MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
MODULE_DESCRIPTION("BD718(15/18/28/37/47/50) and BD70528 chip clk driver"); MODULE_DESCRIPTION("BD718(15/18/28/37/47/50) and chip clk driver");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:bd718xx-clk"); MODULE_ALIAS("platform:bd718xx-clk");