From 58b05e58d155fd5a9a181d51b4c9c8a69a0816d3 Mon Sep 17 00:00:00 2001 From: Jose Abreu Date: Thu, 12 Mar 2020 18:10:09 +0100 Subject: [PATCH 1/2] net: phy: Add XLGMII interface define Add a define for XLGMII interface. Signed-off-by: Jose Abreu Signed-off-by: David S. Miller --- include/linux/phy.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/phy.h b/include/linux/phy.h index 7a08023bdbc5..6b872aed8ba6 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -94,6 +94,7 @@ typedef enum { PHY_INTERFACE_MODE_RTBI, PHY_INTERFACE_MODE_SMII, PHY_INTERFACE_MODE_XGMII, + PHY_INTERFACE_MODE_XLGMII, PHY_INTERFACE_MODE_MOCA, PHY_INTERFACE_MODE_QSGMII, PHY_INTERFACE_MODE_TRGMII, @@ -165,6 +166,8 @@ static inline const char *phy_modes(phy_interface_t interface) return "smii"; case PHY_INTERFACE_MODE_XGMII: return "xgmii"; + case PHY_INTERFACE_MODE_XLGMII: + return "xlgmii"; case PHY_INTERFACE_MODE_MOCA: return "moca"; case PHY_INTERFACE_MODE_QSGMII: From 1671c42d4872adb5636a2478ce63f806726b0b2f Mon Sep 17 00:00:00 2001 From: Jose Abreu Date: Thu, 12 Mar 2020 18:10:10 +0100 Subject: [PATCH 2/2] net: phylink: Add XLGMII support Add XLGMII interface and the list of XLGMII speeds to PHYLINK. Signed-off-by: Jose Abreu Signed-off-by: David S. Miller --- drivers/net/phy/phylink.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index a8eeaabb2d18..60f32b354013 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -326,6 +326,33 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) phylink_set(pl->supported, 10000baseER_Full); break; + case PHY_INTERFACE_MODE_XLGMII: + phylink_set(pl->supported, 25000baseCR_Full); + phylink_set(pl->supported, 25000baseKR_Full); + phylink_set(pl->supported, 25000baseSR_Full); + phylink_set(pl->supported, 40000baseKR4_Full); + phylink_set(pl->supported, 40000baseCR4_Full); + phylink_set(pl->supported, 40000baseSR4_Full); + phylink_set(pl->supported, 40000baseLR4_Full); + phylink_set(pl->supported, 50000baseCR2_Full); + phylink_set(pl->supported, 50000baseKR2_Full); + phylink_set(pl->supported, 50000baseSR2_Full); + phylink_set(pl->supported, 50000baseKR_Full); + phylink_set(pl->supported, 50000baseSR_Full); + phylink_set(pl->supported, 50000baseCR_Full); + phylink_set(pl->supported, 50000baseLR_ER_FR_Full); + phylink_set(pl->supported, 50000baseDR_Full); + phylink_set(pl->supported, 100000baseKR4_Full); + phylink_set(pl->supported, 100000baseSR4_Full); + phylink_set(pl->supported, 100000baseCR4_Full); + phylink_set(pl->supported, 100000baseLR4_ER4_Full); + phylink_set(pl->supported, 100000baseKR2_Full); + phylink_set(pl->supported, 100000baseSR2_Full); + phylink_set(pl->supported, 100000baseCR2_Full); + phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); + phylink_set(pl->supported, 100000baseDR2_Full); + break; + default: phylink_err(pl, "incorrect link mode %s for in-band status\n",