clocksource: sh_mtu2: Add support for multiple channels per device
MTU2 hardware devices can support multiple channels, with global registers and per-channel registers. The sh_mtu2 driver currently models the hardware with one Linux device per channel. This model makes it difficult to handle global registers in a clean way. Add support for a new model that uses one Linux device per timer with multiple channels per device. This requires changes to platform data, add new channel configuration fields. Support for the legacy model is kept and will be removed after all platforms switch to the new model. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Wolfram Sang <wsa@sang-engineering.com>
This commit is contained in:
Laurent Pinchart
parent
207e21a973
commit
faf3f4f8c8
@ -54,6 +54,9 @@ struct sh_mtu2_device {
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struct sh_mtu2_channel *channels;
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unsigned int num_channels;
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bool legacy;
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bool has_clockevent;
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};
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static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
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@ -163,8 +166,12 @@ static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr)
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{
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unsigned long offs;
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if (reg_nr == TSTR)
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return ioread8(ch->mtu->mapbase);
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if (reg_nr == TSTR) {
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if (ch->mtu->legacy)
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return ioread8(ch->mtu->mapbase);
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else
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return ioread8(ch->mtu->mapbase + 0x280);
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}
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offs = mtu2_reg_offs[reg_nr];
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@ -180,8 +187,10 @@ static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
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unsigned long offs;
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if (reg_nr == TSTR) {
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iowrite8(value, ch->mtu->mapbase);
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return;
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if (ch->mtu->legacy)
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return iowrite8(value, ch->mtu->mapbase);
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else
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return iowrite8(value, ch->mtu->mapbase + 0x280);
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}
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offs = mtu2_reg_offs[reg_nr];
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@ -353,109 +362,168 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
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static int sh_mtu2_register(struct sh_mtu2_channel *ch, const char *name,
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bool clockevent)
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{
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if (clockevent)
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if (clockevent) {
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ch->mtu->has_clockevent = true;
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sh_mtu2_register_clockevent(ch, name);
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}
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return 0;
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}
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static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
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static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch, unsigned int index,
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struct sh_mtu2_device *mtu)
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{
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struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
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static const unsigned int channel_offsets[] = {
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0x300, 0x380, 0x000,
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};
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bool clockevent;
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ch->mtu = mtu;
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ch->index = cfg->timer_bit;
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ch->irq = platform_get_irq(mtu->pdev, 0);
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if (mtu->legacy) {
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struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
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clockevent = cfg->clockevent_rating != 0;
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ch->irq = platform_get_irq(mtu->pdev, 0);
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ch->base = mtu->mapbase - cfg->channel_offset;
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ch->index = cfg->timer_bit;
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} else {
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char name[6];
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clockevent = true;
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sprintf(name, "tgi%ua", index);
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ch->irq = platform_get_irq_byname(mtu->pdev, name);
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ch->base = mtu->mapbase + channel_offsets[index];
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ch->index = index;
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}
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if (ch->irq < 0) {
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/* Skip channels with no declared interrupt. */
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if (!mtu->legacy)
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return 0;
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dev_err(&mtu->pdev->dev, "ch%u: failed to get irq\n",
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ch->index);
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return ch->irq;
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}
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return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev),
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cfg->clockevent_rating != 0);
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return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev), clockevent);
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}
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static int sh_mtu2_map_memory(struct sh_mtu2_device *mtu)
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{
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struct resource *res;
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res = platform_get_resource(mtu->pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&mtu->pdev->dev, "failed to get I/O memory\n");
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return -ENXIO;
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}
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mtu->mapbase = ioremap_nocache(res->start, resource_size(res));
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if (mtu->mapbase == NULL)
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return -ENXIO;
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/*
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* In legacy platform device configuration (with one device per channel)
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* the resource points to the channel base address.
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*/
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if (mtu->legacy) {
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struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
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mtu->mapbase += cfg->channel_offset;
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}
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return 0;
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}
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static void sh_mtu2_unmap_memory(struct sh_mtu2_device *mtu)
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{
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if (mtu->legacy) {
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struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
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mtu->mapbase -= cfg->channel_offset;
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}
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iounmap(mtu->mapbase);
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}
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static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
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struct platform_device *pdev)
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{
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struct sh_timer_config *cfg = pdev->dev.platform_data;
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struct resource *res;
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void __iomem *base;
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const struct platform_device_id *id = pdev->id_entry;
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unsigned int i;
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int ret;
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ret = -ENXIO;
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mtu->pdev = pdev;
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mtu->legacy = id->driver_data;
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if (!cfg) {
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if (mtu->legacy && !cfg) {
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dev_err(&mtu->pdev->dev, "missing platform data\n");
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goto err0;
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return -ENXIO;
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}
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platform_set_drvdata(pdev, mtu);
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res = platform_get_resource(mtu->pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&mtu->pdev->dev, "failed to get I/O memory\n");
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goto err0;
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}
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/*
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* Map memory, let base point to our channel and mapbase to the
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* start/stop shared register.
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*/
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base = ioremap_nocache(res->start, resource_size(res));
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if (base == NULL) {
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dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
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goto err0;
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}
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mtu->mapbase = base + cfg->channel_offset;
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/* get hold of clock */
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/* Get hold of clock. */
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mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
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if (IS_ERR(mtu->clk)) {
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dev_err(&mtu->pdev->dev, "cannot get clock\n");
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ret = PTR_ERR(mtu->clk);
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goto err1;
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return PTR_ERR(mtu->clk);
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}
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ret = clk_prepare(mtu->clk);
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if (ret < 0)
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goto err2;
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goto err_clk_put;
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mtu->channels = kzalloc(sizeof(*mtu->channels), GFP_KERNEL);
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if (mtu->channels == NULL) {
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ret = -ENOMEM;
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goto err3;
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/* Map the memory resource. */
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ret = sh_mtu2_map_memory(mtu);
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if (ret < 0) {
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dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
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goto err_clk_unprepare;
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}
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mtu->num_channels = 1;
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/* Allocate and setup the channels. */
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if (mtu->legacy)
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mtu->num_channels = 1;
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else
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mtu->num_channels = 3;
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mtu->channels[0].base = base;
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mtu->channels = kzalloc(sizeof(*mtu->channels) * mtu->num_channels,
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GFP_KERNEL);
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if (mtu->channels == NULL) {
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ret = -ENOMEM;
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goto err_unmap;
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}
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ret = sh_mtu2_setup_channel(&mtu->channels[0], mtu);
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if (ret < 0)
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goto err3;
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if (mtu->legacy) {
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ret = sh_mtu2_setup_channel(&mtu->channels[0], 0, mtu);
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if (ret < 0)
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goto err_unmap;
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} else {
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for (i = 0; i < mtu->num_channels; ++i) {
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ret = sh_mtu2_setup_channel(&mtu->channels[i], i, mtu);
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if (ret < 0)
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goto err_unmap;
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}
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}
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platform_set_drvdata(pdev, mtu);
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return 0;
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err3:
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err_unmap:
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kfree(mtu->channels);
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sh_mtu2_unmap_memory(mtu);
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err_clk_unprepare:
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clk_unprepare(mtu->clk);
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err2:
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err_clk_put:
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clk_put(mtu->clk);
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err1:
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iounmap(base);
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err0:
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return ret;
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}
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static int sh_mtu2_probe(struct platform_device *pdev)
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{
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struct sh_mtu2_device *mtu = platform_get_drvdata(pdev);
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struct sh_timer_config *cfg = pdev->dev.platform_data;
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int ret;
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if (!is_early_platform_device(pdev)) {
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@ -484,7 +552,7 @@ static int sh_mtu2_probe(struct platform_device *pdev)
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return 0;
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out:
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if (cfg->clockevent_rating)
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if (mtu->has_clockevent)
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pm_runtime_irq_safe(&pdev->dev);
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else
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pm_runtime_idle(&pdev->dev);
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@ -497,12 +565,20 @@ static int sh_mtu2_remove(struct platform_device *pdev)
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return -EBUSY; /* cannot unregister clockevent */
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}
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static const struct platform_device_id sh_mtu2_id_table[] = {
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{ "sh_mtu2", 1 },
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{ "sh-mtu2", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(platform, sh_mtu2_id_table);
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static struct platform_driver sh_mtu2_device_driver = {
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.probe = sh_mtu2_probe,
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.remove = sh_mtu2_remove,
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.driver = {
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.name = "sh_mtu2",
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}
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},
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.id_table = sh_mtu2_id_table,
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};
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static int __init sh_mtu2_init(void)
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