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arm64: dts: qcom: sc7180: Add pazquel dts files

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Pazquel is a trogdor-based board. These dts files are unchanged copies
from the downstream Chrome OS 5.4 kernel.

Signed-off-by: Joseph S. Barrera III <joebar@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.4.I41e2c2dc12961fe000ebc4d4ef6f0bc5da1259ea@changeid
This commit is contained in:
Joseph S. Barrera III 2022-06-25 18:39:05 -07:00 committed by Bjorn Andersson
parent 9520fef900
commit fb69f6adaf
6 changed files with 303 additions and 0 deletions
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4
arch/arm64/boot/dts/qcom/Makefile
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@ -77,6 +77,10 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev0-auo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev0-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev1-auo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-mrbland-rev1-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-lte-parade.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-lte-ti.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-parade.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pazquel-ti.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb

22
arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel-lte-parade.dts Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-parade-ps8640.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Pazquel (Parade,LTE)";
compatible = "google,pazquel-sku4", "qcom,sc7180";
};
&ap_sar_sensor_i2c {
status = "okay";
};

22
arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel-lte-ti.dts Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google Pazquel (TI,LTE)";
compatible = "google,pazquel-sku0", "google,pazquel-sku2", "qcom,sc7180";
};
&ap_sar_sensor_i2c {
status = "okay";
};

17
arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel-parade.dts Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2022 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-parade-ps8640.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
/ {
model = "Google Pazquel (Parade)";
compatible = "google,pazquel-sku5", "qcom,sc7180";
};

17
arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel-ti.dts Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
#include "sc7180-trogdor-pazquel.dtsi"
/ {
model = "Google Pazquel (TI)";
compatible = "google,pazquel-sku1", "qcom,sc7180";
};

221
arch/arm64/boot/dts/qcom/sc7180-trogdor-pazquel.dtsi Normal file
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@ -0,0 +1,221 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Pazquel board device tree source
*
* Copyright 2021 Google LLC.
*/
/* This file must be included after sc7180-trogdor.dtsi */
&ap_sar_sensor {
compatible = "semtech,sx9324";
semtech,ph0-pin = <1 3 3>;
semtech,ph1-pin = <3 1 3>;
semtech,ph2-pin = <1 3 3>;
semtech,ph3-pin = <0 0 0>;
semtech,ph01-resolution = <1024>;
semtech,ph23-resolution = <1024>;
semtech,startup-sensor = <1>;
semtech,ph01-proxraw-strength = <3>;
semtech,ph23-proxraw-strength = <1>;
semtech,avg-pos-strength = <128>;
semtech,input-analog-gain = <0>;
semtech,cs-idle-sleep = "gnd";
/delete-property/ svdd-supply;
vdd-supply = <&pp1800_prox>;
};
/delete-node/&trackpad;
&ap_tp_i2c {
status = "okay";
trackpad: trackpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
pinctrl-names = "default";
pinctrl-0 = <&tp_int_odl>;
interrupt-parent = <&tlmm>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
vcc-supply = <&pp3300_fp_tp>;
post-power-on-delay-ms = <100>;
hid-descr-addr = <0x0001>;
wakeup-source;
};
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
&panel {
compatible = "edp-panel";
};
&pp3300_dx_edp {
gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};
&en_pp3300_dx_edp {
pinmux {
pins = "gpio67";
};
pinconf {
pins = "gpio67";
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "TP_INT_ODL",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"AP_TP_I2C_SDA",
"AP_TP_I2C_SCL",
"TS_RESET_L",
"TS_INT_L",
"",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"",
"",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"HUB_RST_L",
"",
"",
"",
"",
"",
"AMP_EN",
"P_SENSOR_INT_L",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"HP_IRQ",
"",
"",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"EN_PP3300_DX_EDP",
"AP_SPI_CS0_L",
"",
"",
"",
"",
"",
"",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"CODEC_PWR_EN",
"HUB_EN",
"",
"",
"",
"",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};