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arm64: dts: imx8mp: add GPC node with GPU power domains

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Add the power domains for the GPUs, which do not require any interaction with
a blk-ctrl, but are simply two PU domains nested inside a MIX domain.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Lucas Stach 2022-03-30 12:46:19 +02:00 committed by Shawn Guo
parent 579df42888
commit fc0f051246
1 changed files with 41 additions and 0 deletions
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41
arch/arm64/boot/dts/freescale/imx8mp.dtsi
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@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/imx8mp-clock.h>
#include <dt-bindings/power/imx8mp-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -475,6 +476,46 @@
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
gpc: gpc@303a0000 {
compatible = "fsl,imx8mp-gpc";
reg = <0x303a0000 0x1000>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <3>;
pgc {
#address-cells = <1>;
#size-cells = <0>;
pgc_gpu2d: power-domain@6 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_GPU2D>;
clocks = <&clk IMX8MP_CLK_GPU2D_ROOT>;
power-domains = <&pgc_gpumix>;
};
pgc_gpumix: power-domain@7 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_GPUMIX>;
clocks = <&clk IMX8MP_CLK_GPU_ROOT>,
<&clk IMX8MP_CLK_GPU_AHB>;
assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
<&clk IMX8MP_CLK_GPU_AHB>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <800000000>, <400000000>;
};
pgc_gpu3d: power-domain@9 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
clocks = <&clk IMX8MP_CLK_GPU3D_ROOT>,
<&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
power-domains = <&pgc_gpumix>;
};
};
};
};
aips2: bus@30400000 {