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ARM: S3C24XX: make anubis-cpld, anubis-irq and anubis-map local

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The headers can be local in mach-s3c24xx/.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim 2013-01-01 19:40:53 -08:00
parent 0a2691dade
commit fc351246e2
5 changed files with 58 additions and 92 deletions
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53
arch/arm/mach-s3c24xx/anubis.h Normal file
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@ -0,0 +1,53 @@
/*
* Copyright (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk>
*
* ANUBIS - CPLD control constants
* ANUBIS - IRQ Number definitions
* ANUBIS - Memory map definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MACH_S3C24XX_ANUBIS_H
#define __MACH_S3C24XX_ANUBIS_H __FILE__
/* CTRL2 - NAND WP control, IDE Reset assert/check */
#define ANUBIS_CTRL1_NANDSEL (0x3)
/* IDREG - revision */
#define ANUBIS_IDREG_REVMASK (0x7)
/* irq */
#define ANUBIS_IRQ_IDE0 IRQ_EINT2
#define ANUBIS_IRQ_IDE1 IRQ_EINT3
#define ANUBIS_IRQ_ASIX IRQ_EINT1
/* map */
/* start peripherals off after the S3C2410 */
#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26))
/* we put the CPLD registers next, to get them out of the way */
#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000)
#define ANUBIS_PA_CTRL1 ANUBIS_PA_CPLD
#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000)
#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3 << 23))
#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000)
#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000)
#endif /* __MACH_S3C24XX_ANUBIS_H */

25
arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h
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@ -1,25 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/anubis-cpld.h
*
* Copyright (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk>
*
* ANUBIS - CPLD control constants
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_ANUBISCPLD_H
#define __ASM_ARCH_ANUBISCPLD_H
/* CTRL2 - NAND WP control, IDE Reset assert/check */
#define ANUBIS_CTRL1_NANDSEL (0x3)
/* IDREG - revision */
#define ANUBIS_IDREG_REVMASK (0x7)
#endif /* __ASM_ARCH_ANUBISCPLD_H */

21
arch/arm/mach-s3c24xx/include/mach/anubis-irq.h
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@ -1,21 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/anubis-irq.h
*
* Copyright (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk>
*
* ANUBIS - IRQ Number definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_ANUBISIRQ_H
#define __ASM_ARCH_ANUBISIRQ_H
#define IRQ_IDE0 IRQ_EINT2
#define IRQ_IDE1 IRQ_EINT3
#define IRQ_ASIX IRQ_EINT1
#endif /* __ASM_ARCH_ANUBISIRQ_H */

38
arch/arm/mach-s3c24xx/include/mach/anubis-map.h
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@ -1,38 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/anubis-map.h
*
* Copyright (c) 2005 Simtec Electronics
* http://www.simtec.co.uk/products/
* Ben Dooks <ben@simtec.co.uk>
*
* ANUBIS - Memory map definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* needs arch/map.h including with this */
#ifndef __ASM_ARCH_ANUBISMAP_H
#define __ASM_ARCH_ANUBISMAP_H
/* start peripherals off after the S3C2410 */
#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26))
/* we put the CPLD registers next, to get them out of the way */
#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000)
#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000)
#endif /* __ASM_ARCH_ANUBISMAP_H */

13
arch/arm/mach-s3c24xx/mach-anubis.c
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@ -28,10 +28,6 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/anubis-map.h>
#include <mach/anubis-irq.h>
#include <mach/anubis-cpld.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
@ -55,8 +51,9 @@
#include <plat/cpu.h>
#include <linux/platform_data/asoc-s3c24xx_simtec.h>
#include "simtec.h"
#include "anubis.h"
#include "common.h"
#include "simtec.h"
#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
@ -237,7 +234,7 @@ static struct pata_platform_info anubis_ide_platdata = {
static struct resource anubis_ide0_resource[] = {
[0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
[2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
[3] = DEFINE_RES_IRQ(IRQ_IDE0),
[3] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
};
static struct platform_device anubis_device_ide0 = {
@ -254,7 +251,7 @@ static struct platform_device anubis_device_ide0 = {
static struct resource anubis_ide1_resource[] = {
[0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
[1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
[2] = DEFINE_RES_IRQ(IRQ_IDE0),
[2] = DEFINE_RES_IRQ(ANUBIS_IRQ_IDE0),
};
static struct platform_device anubis_device_ide1 = {
@ -279,7 +276,7 @@ static struct ax_plat_data anubis_asix_platdata = {
static struct resource anubis_asix_resource[] = {
[0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
[1] = DEFINE_RES_IRQ(IRQ_ASIX),
[1] = DEFINE_RES_IRQ(ANUBIS_IRQ_ASIX),
};
static struct platform_device anubis_device_asix = {