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scsi: ufs: ufs-mediatek: Introduce default delay for reference clock

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Introduce default delay time for gating or ungating reference clock instead
of ambiguous magic numbers.

The defined value is suitable for all current MediaTek UFS platforms.

Link: https://lore.kernel.org/r/20211016005802.7729-2-stanley.chu@mediatek.com
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Stanley Chu 2021-10-16 08:58:00 +08:00 committed by Martin K. Petersen
parent 1d2ac7b69d
commit fc65e933fb
2 changed files with 9 additions and 5 deletions
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13
drivers/scsi/ufs/ufs-mediatek.c
View File

@ -282,7 +282,7 @@ out:
}
static void ufs_mtk_setup_ref_clk_wait_us(struct ufs_hba *hba,
u16 gating_us, u16 ungating_us)
u16 gating_us)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@ -293,7 +293,7 @@ static void ufs_mtk_setup_ref_clk_wait_us(struct ufs_hba *hba,
host->ref_clk_gating_wait_us = gating_us;
}
host->ref_clk_ungating_wait_us = ungating_us;
host->ref_clk_ungating_wait_us = REFCLK_DEFAULT_WAIT_US;
}
static void ufs_mtk_dbg_sel(struct ufs_hba *hba)
@ -1102,11 +1102,14 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba)
* requirements.
*/
if (mid == UFS_VENDOR_SAMSUNG)
ufs_mtk_setup_ref_clk_wait_us(hba, 1, 1);
ufs_mtk_setup_ref_clk_wait_us(hba, 1);
else if (mid == UFS_VENDOR_SKHYNIX)
ufs_mtk_setup_ref_clk_wait_us(hba, 30, 30);
ufs_mtk_setup_ref_clk_wait_us(hba, 30);
else if (mid == UFS_VENDOR_TOSHIBA)
ufs_mtk_setup_ref_clk_wait_us(hba, 100, 32);
ufs_mtk_setup_ref_clk_wait_us(hba, 100);
else
ufs_mtk_setup_ref_clk_wait_us(hba,
REFCLK_DEFAULT_WAIT_US);
return 0;
}

1
drivers/scsi/ufs/ufs-mediatek.h
View File

@ -34,6 +34,7 @@
#define REFCLK_ACK BIT(1)
#define REFCLK_REQ_TIMEOUT_US 3000
#define REFCLK_DEFAULT_WAIT_US 32
/*
* Other attributes