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ALSA: cs35l41: Move cs35l41_gpio_config to shared lib

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ASoC and HDA can use a single function to configure the chip gpios.

Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20220413083728.10730-4-tanureal@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Lucas Tanure 2022-04-13 09:37:15 +01:00 committed by Takashi Iwai
parent 2603c974b4
commit fcad8950a5
4 changed files with 48 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/sound/cs35l41.h
View File

@ -798,5 +798,6 @@ int cs35l41_set_channels(struct device *dev, struct regmap *reg,
unsigned int rx_num, unsigned int *rx_slot);
int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, int boost_cap,
int boost_ipk);
int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg);
#endif /* __CS35L41_H */

11
sound/pci/hda/cs35l41_hda.c
View File

@ -235,12 +235,11 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
case CS35L41_NOT_USED:
break;
case CS35l41_VSPK_SWITCH:
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
CS35L41_GPIO1_CTRL_MASK, 1 << CS35L41_GPIO1_CTRL_SHIFT);
hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO;
hw_cfg->gpio1.out_en = true;
break;
case CS35l41_SYNC:
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
CS35L41_GPIO1_CTRL_MASK, 2 << CS35L41_GPIO1_CTRL_SHIFT);
hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC;
break;
default:
dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n",
@ -254,8 +253,6 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
case CS35L41_NOT_USED:
break;
case CS35L41_INTERRUPT:
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
CS35L41_GPIO2_CTRL_MASK, 2 << CS35L41_GPIO2_CTRL_SHIFT);
break;
default:
dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func);
@ -263,6 +260,8 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
}
}
cs35l41_gpio_config(cs35l41->regmap, hw_cfg);
if (internal_boost) {
cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst;
ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap,

41
sound/soc/codecs/cs35l41-lib.c
View File

@ -1040,6 +1040,47 @@ int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_in
}
EXPORT_SYMBOL_GPL(cs35l41_boost_config);
int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg)
{
struct cs35l41_gpio_cfg *gpio1 = &hw_cfg->gpio1;
struct cs35l41_gpio_cfg *gpio2 = &hw_cfg->gpio2;
int irq_pol = IRQF_TRIGGER_NONE;
regmap_update_bits(regmap, CS35L41_GPIO1_CTRL1,
CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK,
gpio1->pol_inv << CS35L41_GPIO_POL_SHIFT |
!gpio1->out_en << CS35L41_GPIO_DIR_SHIFT);
regmap_update_bits(regmap, CS35L41_GPIO2_CTRL1,
CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK,
gpio2->pol_inv << CS35L41_GPIO_POL_SHIFT |
!gpio2->out_en << CS35L41_GPIO_DIR_SHIFT);
if (gpio1->valid)
regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO1_CTRL_MASK,
gpio1->func << CS35L41_GPIO1_CTRL_SHIFT);
if (gpio2->valid) {
regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO2_CTRL_MASK,
gpio2->func << CS35L41_GPIO2_CTRL_SHIFT);
switch (gpio2->func) {
case CS35L41_GPIO2_INT_PUSH_PULL_LOW:
case CS35L41_GPIO2_INT_OPEN_DRAIN:
irq_pol = IRQF_TRIGGER_LOW;
break;
case CS35L41_GPIO2_INT_PUSH_PULL_HIGH:
irq_pol = IRQF_TRIGGER_HIGH;
break;
default:
break;
}
}
return irq_pol;
}
EXPORT_SYMBOL_GPL(cs35l41_gpio_config);
MODULE_DESCRIPTION("CS35L41 library");
MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>");
MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");

44
sound/soc/codecs/cs35l41.c
View File

@ -1017,48 +1017,6 @@ static int cs35l41_set_pdata(struct cs35l41_private *cs35l41)
return 0;
}
static int cs35l41_gpio_config(struct cs35l41_private *cs35l41)
{
struct cs35l41_gpio_cfg *gpio1 = &cs35l41->hw_cfg.gpio1;
struct cs35l41_gpio_cfg *gpio2 = &cs35l41->hw_cfg.gpio2;
int irq_pol = IRQF_TRIGGER_NONE;
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO1_CTRL1,
CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK,
gpio1->pol_inv << CS35L41_GPIO_POL_SHIFT |
!gpio1->out_en << CS35L41_GPIO_DIR_SHIFT);
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO2_CTRL1,
CS35L41_GPIO_POL_MASK | CS35L41_GPIO_DIR_MASK,
gpio2->pol_inv << CS35L41_GPIO_POL_SHIFT |
!gpio2->out_en << CS35L41_GPIO_DIR_SHIFT);
if (gpio1->valid)
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
CS35L41_GPIO1_CTRL_MASK,
gpio1->func << CS35L41_GPIO1_CTRL_SHIFT);
if (gpio2->valid) {
regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL,
CS35L41_GPIO2_CTRL_MASK,
gpio2->func << CS35L41_GPIO2_CTRL_SHIFT);
switch (gpio2->func) {
case CS35L41_GPIO2_INT_PUSH_PULL_LOW:
case CS35L41_GPIO2_INT_OPEN_DRAIN:
irq_pol = IRQF_TRIGGER_LOW;
break;
case CS35L41_GPIO2_INT_PUSH_PULL_HIGH:
irq_pol = IRQF_TRIGGER_HIGH;
break;
default:
break;
}
}
return irq_pol;
}
static int cs35l41_component_probe(struct snd_soc_component *component)
{
struct cs35l41_private *cs35l41 = snd_soc_component_get_drvdata(component);
@ -1366,7 +1324,7 @@ int cs35l41_probe(struct cs35l41_private *cs35l41, const struct cs35l41_hw_cfg *
cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
irq_pol = cs35l41_gpio_config(cs35l41);
irq_pol = cs35l41_gpio_config(cs35l41->regmap, &cs35l41->hw_cfg);
/* Set interrupt masks for critical errors */
regmap_write(cs35l41->regmap, CS35L41_IRQ1_MASK1,