net/mlx5: Parse module mapping using mlx5_ifc
The assumption that the first byte in the module mapping dword is the module number shouldn't be hard-coded in the driver, but come from mlx5_ifc structs. While at it, fix the incorrect width for the 'rx_lane' and 'tx_lane' fields. Signed-off-by: Gal Pressman <gal@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -275,7 +275,6 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num)
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{
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u32 in[MLX5_ST_SZ_DW(pmlp_reg)] = {0};
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u32 out[MLX5_ST_SZ_DW(pmlp_reg)];
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int module_mapping;
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int err;
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MLX5_SET(pmlp_reg, in, local_port, 1);
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@ -284,8 +283,9 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num)
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if (err)
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return err;
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module_mapping = MLX5_GET(pmlp_reg, out, lane0_module_mapping);
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*module_num = module_mapping & MLX5_EEPROM_IDENTIFIER_BYTE_MASK;
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*module_num = MLX5_GET(lane_2_module_mapping,
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MLX5_ADDR_OF(pmlp_reg, out, lane0_module_mapping),
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module);
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return 0;
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}
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@ -9888,10 +9888,10 @@ struct mlx5_ifc_pcmr_reg_bits {
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};
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struct mlx5_ifc_lane_2_module_mapping_bits {
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u8 reserved_at_0[0x6];
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u8 rx_lane[0x2];
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u8 reserved_at_8[0x6];
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u8 tx_lane[0x2];
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u8 reserved_at_0[0x4];
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u8 rx_lane[0x4];
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u8 reserved_at_8[0x4];
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u8 tx_lane[0x4];
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u8 reserved_at_10[0x8];
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u8 module[0x8];
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};
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@ -56,7 +56,6 @@ enum mlx5_an_status {
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MLX5_AN_LINK_DOWN = 4,
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};
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#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
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#define MLX5_I2C_ADDR_LOW 0x50
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#define MLX5_I2C_ADDR_HIGH 0x51
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#define MLX5_EEPROM_PAGE_LENGTH 256
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